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IP4778CZ38/V Datasheet(PDF) 19 Page - NXP Semiconductors |
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IP4778CZ38/V Datasheet(HTML) 19 Page - NXP Semiconductors |
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19 / 26 page ![]() IP4778CZ38_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 12 February 2009 19 of 26 NXP Semiconductors IP4778CZ38 HDMI ESD protection, DDC buffering and hot plug control 11. Test information See Table 10 for test data. Rterm = termination resistance should be equal to output impedance Zo of the pulse generator. RL = load resistance. CL = load capacitance. Fig 16. Test circuit for DDC and CEC lines Table 10. Test data Test RL CL VCC DDC lines 1.35 k Ω 50 pF VCC(5V0) CEC line 27 k Ω 50 pF VCC(3V3) 001aah468 DUT Rterm VCC VCC(3V3) VI RL CL VCC(5V0) VO G |
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