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PIC16F707-E/ML Datasheet(PDF) 111 Page - Microchip Technology |
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PIC16F707-E/ML Datasheet(HTML) 111 Page - Microchip Technology |
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111 / 284 page ![]() 2010 Microchip Technology Inc. Preliminary DS41418A-page 111 PIC16F707/PIC16LF707 14.0 TIMERA/B MODULES TimerA and TimerB are two more Timer0-type modules. Timers A and B are available as general- purpose timers/counters, and are closely integrated with the capacitive sensing modules. The TimerA/B modules incorporate the following features: • 8-bit timer/counter register (TMRx) • 8-bit prescaler • Programmable internal or external clock source • Programmable external clock edge selection • Interrupt on overflow • TMRA can be used to gate Timer1 • TMRB can be used to gate Timer3 Figure 14-1 is a block diagram of the TimerA/TimerB modules. FIGURE 14-1: BLOCK DIAGRAM OF THE TIMERA/TIMERB PRESCALER TxCKI TMRxSE pin TMRx TMRxPS<2:0> Data Bus Set Flag bit TMRxIF on Overflow TMRxCS Note 1: TxXCS is in the CPSxCON0 register. 0 1 0 1 8 8 8-bit Prescaler FOSC/4 TMRxPSA Sync 2 Tcy Overflow to Timer1/3 1 0 TxXCS From CPSxOSC |
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