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PIC16F722-E/ML Datasheet(PDF) 56 Page - Microchip Technology |
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PIC16F722-E/ML Datasheet(HTML) 56 Page - Microchip Technology |
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56 / 302 page ![]() PIC16F72X/PIC16LF72X DS41341E-page 56 © 2009 Microchip Technology Inc. 6.2.2 PIN DESCRIPTIONS AND DIAGRAMS Each PORTA pin is multiplexed with other functions. The pins and their combined functions are briefly described here. For specific information about individual functions such as the A/D Converter (ADC), refer to the appropriate section in this data sheet. 6.2.2.1 RA0/AN0/SS/VCAP Figure 6-1 shows the diagram for this pin. This pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC • a slave select input for the SSP(1) • a Voltage Regulator Capacitor pin (PIC16F72X only) 6.2.2.2 RA1/AN1 Figure 6-2 shows the diagram for this pin. This pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC 6.2.2.3 RA2/AN2 Figure 6-2 shows the diagram for this pin. This pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC 6.2.2.4 RA3/AN3/VREF Figure 6-2 shows the diagram for this pin. This pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC • a voltage reference input for the ADC 6.2.2.5 RA4/CPS6/T0CKI Figure 6-3 shows the diagram for this pin. This pin is configurable to function as one of the following: • a general purpose I/O • a capacitive sensing input • a clock input for Timer0 The Timer0 clock input function works independently of any TRIS register setting. Effectively, if TRISA4 = 0, the PORTA4 register bit will output to the pad and Clock Timer0 at the same time. 6.2.2.6 RA5/AN4/CPS7/SS/VCAP Figure 6-4 shows the diagram for this pin. This pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC • a capacitive sensing input • a slave select input for the SSP(1) • a Voltage Regulator Capacitor pin (PIC16F72X only) 6.2.2.7 RA6/OSC2/CLKOUT/VCAP Figure 6-5 shows the diagram for this pin. This pin is configurable to function as one of the following: • a general purpose I/O • a crystal/resonator connection • a clock output • a Voltage Regulator Capacitor pin (PIC16F72X only) 6.2.2.8 RA7/OSC1/CLKIN Figure 6-6 shows the diagram for this pin. This pin is configurable to function as one of the following: • a general purpose I/O • a crystal/resonator connection • a clock input Note 1: SS pin location may be selected as RA5 or RA0. Note 1: SS pin location may be selected as RA5 or RA0. |
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