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HCS12 Datasheet(PDF) 360 Page - Freescale Semiconductor, Inc

Part # HCS12
Description  HCS12 Microcontrollers
PDF  452 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

HCS12 Datasheet(HTML) 360 Page - Freescale Semiconductor, Inc

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S12CPUV2 Reference Manual, Rev. 4.0
360
Freescale Semiconductor
pointer so that the instruction can resume correctly if it is interrupted. After
the REVW instruction finishes, X will point at the next address past the
$FFFF separator word that marks the end of the rule list.
The Y index register is set to the starting address of the list of rule weights.
Each rule weight is an 8-bit value. The weighted result is the truncated upper
eight bits of the 16-bit result, which is derived by multiplying the minimum
rule antecedent value ($00–$FF) by the weight plus one ($001–$100). This
method of weighting rules allows an 8-bit weighting factor to represent a
value between zero and one inclusive.
The 8-bit A accumulator is used to hold intermediate calculation results
during execution of the REVW instruction. During antecedent processing, A
starts out at $FF and is replaced by any smaller fuzzy input that is
referenced by a rule antecedent. If rule weights are enabled by the C
condition code bit equal one, the rule truth value is multiplied by the rule
weight just before consequent processing starts. During consequent
processing, A holds the truth value (possibly weighted) for the rule. This
truth value is stored to any fuzzy output that is referenced by a rule
consequent, unless that fuzzy output is already larger (MAX).
Before starting to execute REVW, A must be set to $FF (the largest 8-bit
value) because rule evaluation always starts with processing of the
antecedents of the first rule. For subsequent rules in the list, A is
automatically set to $FF when the instruction detects the $FFFE marker
word between the last consequent of the previous rule, and the first
antecedent of a new rule.
Both the C and V condition code bits must be set up prior to starting a REVW
instruction. Once the REVW instruction starts, the C bit remains constant
and the value in the V bit is automatically maintained as $FFFE separator
words are detected.
The final requirement to clear all fuzzy outputs to $00 is part of the MAX
algorithm. Each time a rule consequent references a fuzzy output, that fuzzy
output is compared to the truth value (weighted) for the current rule. If the
current truth value is larger, it is written over the previous value in the fuzzy
output. After all rules have been evaluated, the fuzzy output contains the
truth value for the most-true rule that referenced that fuzzy output.
After REVW finishes, A will hold the truth value (weighted) for the last rule
in the rule list. The V condition code bit should be one because the last
element before the $FFFF end marker should have been a rule consequent.
If V is zero after executing REVW, it indicates the rule list was structured
incorrectly.



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