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PIC24FJ64GA Datasheet(PDF) 204 Page - Microchip Technology |
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PIC24FJ64GA Datasheet(HTML) 204 Page - Microchip Technology |
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204 / 262 page ![]() PIC24FJ64GA004 FAMILY DS39881C-page 202 Preliminary © 2008 Microchip Technology Inc. REGISTER 23-2: CW2: FLASH CONFIGURATION WORD 2 U-1 U-1 U-1 U-1 U-1 U-1 U-1 U-1 — — — — — — — — bit 23 bit 16 R/PO-1 U-1 U-1 U-1 U-1 R/PO-1 R/PO-1 R/PO-1 IESO — — — — FNOSC2 FNOSC1 FNOSC0 bit 15 bit 8 R/PO-1 R/PO-1 R/PO-1 R/PO-1 U-1 R/PO-1 R/PO-1 R/PO-1 FCKSM1 FCKSM0 OSCIOFCN IOL1WAY — I2C1SEL POSCMD1 POSCMD0 bit 7 bit 0 Legend: r = Reserved bit R = Readable bit PO = Program Once bit U = Unimplemented bit, read as ‘0’ -n = Value when device is unprogrammed ‘1’ = Bit is set ‘0’ = Bit is cleared bit 23-16 Unimplemented: Read as ‘1’ bit 15 IESO: Internal External Switchover bit 1 = IESO mode (Two-Speed Start-up) enabled 0 = IESO mode (Two-Speed Start-up) disabled bit 14-11 Unimplemented: Read as ‘1’ bit 10-8 FNOSC2:FNOSC0: Initial Oscillator Select bits 111 = Fast RC Oscillator with Postscaler (FRCDIV) 110 = Reserved 101 = Low-Power RC Oscillator (LPRC) 100 = Secondary Oscillator (SOSC) 011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL) 010 = Primary Oscillator (XT, HS, EC) 001 = Fast RC Oscillator with postscaler and PLL module (FRCPLL) 000 = Fast RC Oscillator (FRC) bit 7-6 FCKSM1:FCKSM0: Clock Switching and Fail-Safe Clock Monitor Configuration bits 1x = Clock switching and Fail-Safe Clock Monitor are disabled 01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled 00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled bit 5 OSCIOFCN: OSCO Pin Configuration bit If POSCMD1:POSCMD0 = 11 or 00: 1 = OSCO/CLKO/RA3 functions as CLKO (FOSC/2) 0 = OSCO/CLKO/RA3 functions as port I/O (RA3) If POSCMD1:POSCMD0 = 10 or 01: OSCIOFCN has no effect on OSCO/CLKO/RA3. bit 4 IOL1WAY: IOLOCK One-Way Set Enable bit 1 = The OSCCON<IOLOCK> bit can be set once, provided the unlock sequence has been completed. Once set, the Peripheral Pin Select registers cannot be written to a second time. 0 = The OSCCON<IOLOCK> bit can be set and cleared as needed, provided the unlock sequence has been completed bit 3 Unimplemented: Read as ‘1’ bit 2 I2C1SEL: I2C1 Pin Select bit 1 = Use default SCL1/SDA1 pins 0 = Use alternate SCL1/SDA1 pins bit 1-0 POSCMD1:POSCMD0: Primary Oscillator Configuration bits 11 = Primary oscillator disabled 10 = HS Oscillator mode selected 01 = XT Oscillator mode selected 00 = EC Oscillator mode selected |
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