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MPC8358E Datasheet(PDF) 63 Page - Freescale Semiconductor, Inc |
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MPC8358E Datasheet(HTML) 63 Page - Freescale Semiconductor, Inc |
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63 / 95 page ![]() MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3 Freescale Semiconductor 63 HDLC, BISYNC, Transparent, and Synchronous UART Figure 48 provides the AC test load. Figure 48. AC Test Load 19.3 AC Test Load Figure 49 and Figure 50 represent the AC timing from Table 61 and Table 62. Note that although the specifications generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge is the active edge. Figure 49 shows the timing with external clock. Figure 49. AC Timing (External Clock) Diagram Figure 50 shows the timing with internal clock. Figure 50. AC Timing (Internal Clock) Diagram Output Z0 = 50 Ω OVDD/2 RL = 50 Ω Serial CLK (Input) tHEIXKH tHEIVKH tHEKHOV Input Signals: (See Note) Output Signals: (See Note) tHEKHOX Note: The clock edge is selectable. Serial CLK (Output) tHIIXKH tHIKHOV Input Signals: (See Note) tHIIVKH tHIKHOX Note: The clock edge is selectable. Output Signals: (See Note) |
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