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MPC5643L Datasheet(PDF) 16 Page - Freescale Semiconductor, Inc |
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MPC5643L Datasheet(HTML) 16 Page - Freescale Semiconductor, Inc |
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16 / 124 page  MPC5643L Microcontroller Data Sheet, Rev. 6 Preliminary—Subject to Change Without Notice Introduction Freescale Semiconductor 16 — Error detection and flagging (Parity, Noise and Framing errors) — Interrupt driven operation with four interrupt sources — Separate transmitter and receiver CPU interrupt sources — 16-bit programmable baud-rate modulus counter and 16-bit fractional — 2 receiver wake-up methods • Support for DMA enabled transfers 1.6.29 Deserial Serial Peripheral Interface (DSPI) The DSPI modules provide a synchronous serial interface for communication between the MPC5643L and external devices. A DSPI module provides these features: • Full duplex, synchronous transfers • Master or slave operation • Programmable master bit rates • Programmable clock polarity and phase • End-of-transmission interrupt flag • Programmable transfer baud rate • Programmable data frames from 4 to 16 bits • As many as 8 chip select lines available, depending on package and pin multiplexing • 4 clock and transfer attributes registers • Chip select strobe available as alternate function on one of the chip select pins for de-glitching • FIFOs for buffering as many as 5 transfers on the transmit and receive side • Queueing operation possible through use of the eDMA • General purpose I/O functionality on pins when not used for SPI 1.6.30 FlexPWM The pulse width modulator module (FlexPWM) contains four PWM channels, each of which is configured to control a single half-bridge power stage. Two modules are included on 257 MAPBGA devices; on the 144 LQFP package, only one module is present. Additionally, four fault input channels are provided per FlexPWM module. This PWM is capable of controlling most motor types, including: • AC induction motors (ACIM) • Permanent Magnet AC motors (PMAC) • Brushless (BLDC) and brush DC motors (BDC) • Switched (SRM) and variable reluctance motors (VRM) • Stepper motors A FlexPWM module implements the following features: • 16 bits of resolution for center, edge aligned, and asymmetrical PWMs • Maximum operating frequency as high as 120 MHz — Clock source not modulated and independent from system clock (generated via secondary FMPLL) • Fine granularity control for enhanced resolution of the PWM period • PWM outputs can operate as complementary pairs or independent channels • Ability to accept signed numbers for PWM generation • Independent control of both edges of each PWM output • Synchronization to external hardware or other PWM supported |
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