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MPC5673K Datasheet(PDF) 17 Page - Freescale Semiconductor, Inc |
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MPC5673K Datasheet(HTML) 17 Page - Freescale Semiconductor, Inc |
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17 / 140 page ![]() Overview MPC5675K Microcontroller Data Sheet, Rev. 4 Preliminary—Subject to Change Without Notice Freescale Semiconductor 17 • Collection of test results • Configurable and graded fault control — Internal reactions (no internal reaction, NMI, reset, or safe mode) — External reaction (failure is reported to the outside world via configurable output pins) 1.4.24 System Integration Unit Lite (SIUL) The SIUL controls MCU reset configuration, pad configuration, external interrupt, general purpose I/O (GPIO), internal peripheral multiplexing, and the system reset operation. The reset configuration block contains the external pin boot configuration logic. The pad configuration block controls the static electrical characteristics of I/O pins. The GPIO block provides uniform and discrete input/output control of the I/O pins of the MCU. The SIUL provides the following features: • Centralized pad control on per-pin basis — Pin function selection — Configurable weak pullup/pulldown — Configurable slew rate control (slow/medium/fast) — Hysteresis on GPIO pins — Configurable automatic safe mode pad control • Input filtering for external interrupts 1.4.25 Cyclic Redundancy Checker (CRC) unit The CRC module is a configurable multiple data flow unit to compute CRC signatures on data written to an input register. The CRC unit has the following features: • Three sets of registers to allow three concurrent contexts with possibly different CRC computations, each with a selectable polynomial and seed • Computes 16- or 32-bit wide CRC on the fly (single-cycle computation) and stores the result in an internal register • Implements the following standard CRC polynomials: — x16 + x12 + x5 + 1 [16-bit CRC-CCITT] — x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1 [32-bit CRC-ethernet(32)] • Key engine to be coupled with communication periphery where CRC application is added to allow implementation of safe communication protocol • Offloads the core from cycle-consuming CRC and helps in checking the configuration signature for safe start-up or periodic procedures • Connected as a peripheral on the internal peripheral bus • Provides DMA support |
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