FM3130-G datasheet(3/22 Pages) RAMTRON

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FM3130 Integrated RTC/Alarm with 64Kb FRAM

Rev. 3.2

Sept. 2011

Page 3 of 22

Overview

The FM3130 device combines a serial nonvolatile

RAM with a real-time clock (RTC) and alarm. These

complementary

but

distinct

functions

common interface in a single package. Although

monolithic, the product is organized as two logical

devices, the F-RAM memory and the RTC/alarm.

From the system perspective, they appear to be two

separate devices with unique IDs on the serial bus.

The memory is organized as a stand-alone 2-wire

nonvolatile memory with a standard device ID value.

The real-time clock and alarm are accessed with a

separate 2-wire device ID. This allows clock/calendar

data to be read while maintaining the most recently

used memory address. The clock and alarm are

controlled by 15 special function registers. The

registers are maintained by the power source on the

VBAK pin, allowing them to operate from battery or

backup capacitor power when VDD drops below a set

threshold. Each functional block is described below.

Memory Operation

The FM3130 integrates a 64Kb F-RAM. The

memory is organized in bytes, 8192 addresses of 8

bits each. The memory is based on F-RAM

technology. Therefore it can be treated as RAM and

is read or written at the speed of the two-wire bus

with no delays for write operations. It also offers

effectively unlimited write endurance unlike other

nonvolatile memory technologies. The two-wire

interface protocol is described further on page 12.

The memory array can be write-protected by

software. Two bits (WP0, WP1) in register 0Eh

control the protection setting as shown in the

following table. Based on the setting, the protected

addresses cannot be written and the 2-wire interface

will not acknowledge any data to protected addresses.

The special function registers containing these bits

are described in detail below.

Table 1. F-RAM Write-Protect

Write-Protect Range

WP1

WP0

None

Bottom 1/4

Bottom 1/2

Full array

The WP bits are battery-backed. On a powerup

without a backup source, the WP bits are cleared to a

„0‟ state.

Real-Time Clock Operation

The real-time clock (RTC) is a timekeeping device

that

can

battery

capacitor

backed

for

permanently-powered operation. It offers a software

calibration feature that allows high accuracy.

The RTC consists of an oscillator, clock divider, and

a register system for user access. It divides down the

32.768 kHz time-base and provides a minimum

resolution of seconds (1Hz). Static registers provide

the user with read/write access to the time values. It

includes registers for seconds, minutes, hours, day-

of-the-week, date, months, and years. A block

diagram (Figure 2) illustrates the RTC function.

The

user

registers

are

synchronized

with

the

timekeeper core using R and W bits in register 00h

described below. Changing the R bit from 0 to 1

transfers timekeeping information from the core into

holding registers that can be read by the user. If a

timekeeper update is pending when R is set, then the

core will be updated prior to loading the user

registers. The registers are frozen and will not be

updated again until the R bit is cleared to „0‟. R is

used to read the time.

Setting the W bit to „1‟ locks the user registers.

Clearing it to a „0‟ causes the values in the user

registers to be loaded into the timekeeper core. W is

used for writing new time values. Users should be

certain not to load invalid values, such as FFh, to the

timekeeping registers. Updates to the timekeeping

core occur continuously except when locked. All

timekeeping registers must be initialized at the first

powerup or when the LB bit is set.

See the

description of the LB bit on page 11.

Backup Power

The real-time clock/calendar is intended to be

permanently powered. When the primary system

power fails, the voltage on the VDD pin will drop.

When VDD is less than VSW, the RTC will switch to

the backup power supply on VBAK. The clock

operates at extremely low current in order to

maximize battery or capacitor life. However, an

advantage of combining a clock function with F-

RAM memory is that data is not lost regardless of the

backup power source.

If a battery is applied without a VDD power supply,

the device has been designed to ensure the IBAK

current does not exceed the 1A maximum limit.

Trickle Charger

To facilitate capacitor backup the VBAK pin can

optionally provide a trickle charge current. When the

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