PIC32MX120F032D datasheet(44/320 Pages) MICROCHIP

Part #	PIC32MX120F032D

Description	32-bit Microcontrollers (up to 128 KB Flash and 32 KB SRAM) with Audio and Graphics Interfaces, USB, and Advanced Analog

PDF	320 Pages

Scroll/Zoom	100%

Manufacturer	MICROCHIP [Microchip Technology]

Direct Link	http://www.microchip.com

Logo

44 / 320 page

1110

IPC8

31:16

—

PMPIP<2:0>

PMPIS<1:0>

—

CNIP<2:0>

CNIS<1:0>

0000

15:0

—

I2C1IP<2:0>

I2C1IS<1:0>

—

U1IP<2:0>

U1IS<1:0>

0000

1120

IPC9

31:16

—

CTMUIP<2:0>

CTMUIS<1:0>

—

I2C2IP<2:0>

I2C2IS<1:0>

0000

15:0

—

U2IP<2:0>

U2IS<1:0>

—

SPI2IP<2:0>

SPI2IS<1:0>

0000

1130

IPC10

31:16

—

DMA3IP<2:0>

DMA3IS<1:0>

—

DMA2IP<2:0>

DMA2IS<1:0>

0000

15:0

—

DMA1IP<2:0>

DMA1IS<1:0>

—

DMA0IP<2:0>

DMA0IS<1:0>

0000

TABLE 4-2:

INTERRUPT REGISTER MAP(1) (CONTINUED)

Bits

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

Legend:

x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.

Note 1:

With the exception of those noted, all registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4 0x8 and 0xC, respectively. See Section 11.2 “CLR,

SET and INV Registers” for more information.

These bits are not available on PIC32MX1XX devices.

This register does not have associated CLR, SET, INV registers.

PIC32MX120F032D Datasheet(PDF) 44 Page - Microchip Technology

PIC32MX120F032D Datasheet(HTML) 44 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL