MPC8377E datasheet(11/127 Pages) FREESCALE

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MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8

Freescale Semiconductor

voltage supplies—GVDD, LVDD, and OVDD—do not have any ordering requirements with respect to one

another.

Figure 3. Power-Up Sequencing Example

Note that the SerDes power supply (L[1,2]_nVDD) should follow the same timing as the core supply

(VDD).

The device does not require the core supply voltage and I/O supply voltages to be powered down in any

particular order.

Power Characteristics

The estimated typical power dissipation for the chip device is shown in this table.

Table 5. Power Dissipation 1

Core Frequency

(MHz)

CSB/DDR Frequency

(MHz)

Sleep Power

at Tj =65°C (W)

Typical Application

at Tj =65°C (W)

Typical Application

at Tj =125°C (W)

Max Application

at Tj =125°C (W)

333

1.45

1.9

3.2

3.8

167

1.45

1.8

3.0

3.6

400

1.45

2.0

3.3

4.0

266

1.45

1.9

3.1

3.8

450

300

1.45

2.0

3.2

3.8

225

1.45

1.9

3.1

3.7

500

333

1.45

2.0

3.3

3.9

250

1.45

1.9

3.2

3.8

533

355

1.45

2.0

3.3

4.0

266

1.45

2.0

3.2

3.9

90%

Core Voltage (VDD, AVDD)

I/O Voltage (GVDD, LVDD, and OVDD)

0.7 V

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