MPC8377E datasheet(20/127 Pages) FREESCALE

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MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8

Freescale Semiconductor

6.2.2

DDR1 and DDR2 SDRAM Output AC Timing Specifications

This table shows the DDR1 and DDR2 SDRAM output AC timing specifications.

Table 21. DDR1 and DDR2 SDRAM Output AC Timing Specifications

Parameter

Symbol1

Min

Max

Unit

Note

MCK

n cycle time, MCKn/MCKn crossing

tMCK

510

ADDR/CMD output setup with respect to MCK

400 MHz data rate

333 MHz data rate

266 MHz data rate

200 MHz data rate

tDDKHAS

1.95

2.40

3.15

4.20

—

3, 7

ADDR/CMD output hold with respect to MCK

400 MHz data rate

333 MHz data rate

266 MHz data rate

200 MHz data rate

tDDKHAX

1.95

2.40

3.15

4.20

—

3, 7

MCS

n output setup with respect to MCK

400 MHz data rate

333 MHz data rate

266 MHz data rate

200 MHz data rate

tDDKHCS

1.95

2.40

3.15

4.20

—

MCS

n output hold with respect to MCK

400 MHz data rate

333 MHz data rate

266 MHz data rate

200 MHz data rate

tDDKHCX

1.95

2.40

3.15

4.20

—

MCK to MDQS skew

tDDKHMH

–0.6

0.6

4, 8

MDQ//MDM output setup with respect to MDQS

400 MHz data rate

333 MHz data rate

266 MHz data rate

200 MHz data rate

tDDKHDS,

tDDKLDS

550

800

1100

1200

—

5, 8

MDQ//MDM output hold with respect to MDQS

400 MHz data rate

333 MHz data rate

266 MHz data rate

200 MHz data rate

tDDKHDX,

tDDKLDX

700

800

1100

1200

—

5, 8

MDQS preamble start

tDDKHMP

–0.5

× tMCK –0.6

–0.5

× tMCK + 0.6

6, 8

MPC8377E Datasheet(PDF) 20 Page - Freescale Semiconductor, Inc

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