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MPC8377E Datasheet(PDF) 13 Page - Freescale Semiconductor, Inc |
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MPC8377E Datasheet(HTML) 13 Page - Freescale Semiconductor, Inc |
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13 / 127 page ![]() MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8 Freescale Semiconductor 13 4 Clock Input Timing This section provides the clock input DC and AC electrical characteristics for the chip. Note that the PCI_CLK/PCI_SYNC_IN signal or CLKIN signal is used as the PCI input clock depending on whether the device is configured as a host or agent device. CLKIN is used when the device is in host mode. PCI I/O Load = 30 pf 33 MHz, 32-bit — — 0.04 — — — W — 66 MHz, 32-bit — — 0.07 — — — W Local Bus I/O Load = 25 pf 167 MHz, 32-bit 0.09 0.17 0.29 — — — W — 133 MHz, 32-bit 0.07 0.14 0.24 — — — W 83 MHz, 32-bit 0.05 0.09 0.15 — — — W 66 MHz, 32-bit 0.04 0.07 0.13 — — — W 50 MHz, 32-bit 0.03 0.06 0.1 — — — W eTSEC I/O Load = 25 pf MII or RMII — — — 0.02 — — W Multiply by number of interfaces used. RGMII or RTBI — — — — 0.05 — W — USB (60MHz Clock) 12 Mbps — — 0.01 — — — W — 480 Mbps — — 0.2 — — — W SerDes per lane — — — — 0.029 W — Other I/O — — — 0.01 — — — W — Note: The values given are for typical, and not worst case, switching. Table 6. Typical I/O Power Dissipation (continued) Interface Parameter GVDD (1.8 V) GVDD/LBVDD (2.5 V) OVDD (3.3 V) LVDD (3.3 V) LVDD (2.5 V) L[1,2]_ nVDD (1.0 V) Unit Comments |
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