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ST10F280 Datasheet(PDF) 197 Page - STMicroelectronics |
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ST10F280 Datasheet(HTML) 197 Page - STMicroelectronics |
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197 / 239 page ![]() ST10F280 Special function register overview Doc ID 8673 Rev. 3 197/239 CSCFG Chip Select Configuration Control 0: Latched Chip Select lines: CSx change 1 TCL after rising edge of ALE 1: Unlatched Chip Select lines: CSx change with rising edge of ALE. WRCFG Write Configuration Control (Inverted copy of bit WRC of RP0H) 0: Pins WR and BHE retain their normal function 1: Pin WR acts as WRL, pin BHE acts as WRH. CLKEN System Clock Output Enable (CLKOUT) 0: CLKOUT disabled: pin may be used for general purpose I/O 1: CLKOUT enabled: pin outputs the system clock signal. BYTDIS Disable/Enable Control for Pin BHE (Set according to data bus width) 0: Pin BHE enabled 1: Pin BHE disabled, pin may be used for general purpose I/O. ROMEN Internal Memory Enable (Set according to pin EA during reset) 0: Internal Memory disabled: accesses to the Memory area use the external bus 1: Internal Memory enabled. SGTDIS Segmentation Disable/Enable Control 0: Segmentation enabled (CSP is saved/restored during interrupt entry/exit) 1: Segmentation disabled (Only IP is saved/restored). ROMS1 Internal Flash Memory Mapping 0: Internal Flash Memory area mapped to segment 0 (00’0000H...00’7FFFH) 1: Internal Flash Memory area mapped to segment 1 (01’0000H...01’7FFFH). STKSZ System Stack Size Selects the size of the system stack (in the internal RAM) from 32 to 1024 words. Table 40. Stack size selection <STKSZ> Stack size (words) Internal RAM addresses (words) of physical stack Significant bits of stack pointer SP 0 0 0 b 256 00’FBFEh...00’FA00h (Default after Reset) SP.8...SP.0 0 0 1 b 128 00’FBFEh...00’FB00h SP.7...SP.0 0 1 0 b 64 00’FBFEh...00’FB80h SP.6...SP.0 0 1 1 b 32 00’FBFEh...00’FBC0h SP.5...SP.0 1 0 0 b 512 00’FBFEh...00’F800h (not for 1K Byte IRAM) SP.9...SP.0 1 0 1 b - Reserved. Do not use this combination - 1 1 0 b - Reserved. Do not use this combination - 1 1 1 b 1024 00’FDFEh...00’FX00h (Note: No circular stack) 00’FX00h represents the lower IRAM limit, i.e. 1K Byte: 00’FA00h, 2K Byte: 00’F600h, 3K Byte: 00’F200h SP.11...SP.0 |
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