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ST10F280 Datasheet(PDF) 199 Page - STMicroelectronics |
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ST10F280 Datasheet(HTML) 199 Page - STMicroelectronics |
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199 / 239 page ![]() ST10F280 Special function register overview Doc ID 8673 Rev. 3 199/239 BUSCON3 Address: 0xFF18h / 8Ch SFR Reset: 0x0000h Type: R/W BUSCON4 Address: 0xFF14h / 8Dh SFR Reset: 0x0000h Type: R/W 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 - -BTYP MCTC R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 - -BTYP MCTC R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W MCTC Memory Cycle Time Control (Number of memory cycle time wait states) 0000: 15 wait states (Nber = 15 [MCTC]) . . . 1111: No wait states RWDCx Read/Write Delay Control for BUSCONx 0: With read/write delay: activate command 1 TCL after falling edge of ALE 1: No read/write delay: activate command with falling edge of ALE MTTCx Memory Tristate Time Control 0: 1 wait state 1: No wait state BTYP External Bus Configuration 00: 8-bit Demultiplexed Bus 01: 8-bit Multiplexed Bus 10: 16-bit Demultiplexed Bus 11: 16-bit Multiplexed Bus Note: For BUSCON0, BTYP bit-field is defined via PORT0 during reset. ALECTLx ALE Lengthening Control 0: Normal ALE signal 1: Lengthened ALE signal BUSACTx Bus Active Control 0: External bus disabled 1: External bus enabled (within the respective address window, see ADDRSEL) |
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