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ST10F280 Datasheet(PDF) 202 Page - STMicroelectronics |
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ST10F280 Datasheet(HTML) 202 Page - STMicroelectronics |
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202 / 239 page  Special function register overview ST10F280 202/239 Doc ID 8673 Rev. 3 XP3IC Address: 0xF19Eh / CFh ESFR Reset: 0x--00h Type: R/W Note: XP3IC register has the same bit field as xxIC interrupt registers xxIC Address: 0xyyyyh / zzh SFR Reset: 0x--00h Type: R/W EXIxSS Port 2 pin Alternate source 0P2.8 CAN1_RxD 1P2.9 CAN2_RxD 2...7 P2.10...15 Not used (zero) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 - - - - - - - - XP3IR XP3IE XP3ILVL GLVL R/W R/W R/W R/W 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 --- -- --- xxIR xxIE ILVL GLVL R/W R/W R/W R/W GLVL Group Level Defines the internal order for simultaneous requests of the same priority. 11: Highest group priority 00: Lowest group priority ILVL Interrupt Priority Level Defines the priority level for the arbitration of requests. 1111: Highest priority level 0000: Lowest priority level xxIE Interrupt Enable Control Bit (individually enables/disables a specific source) 0: Interrupt Request is disabled 1: Interrupt Request is enabled xxIR Interrupt Request Flag 0: No request pending 1: This source has raised an interrupt request |
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