PXR40 datasheet(66/100 Pages) FREESCALE

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PXR40 Microcontroller Data Sheet, Rev. 1

Electrical characteristics

Freescale Semiconductor

5.8

Oscillator and FMPLL electrical characteristics

Diff Skew Itphla-tplhbI or

Itplhb-tphlaI

TSKEW

——

—

0.5

Termination

Trans. Line (differential Zo)

—

100

105

ohms

Temperature

—

–40

—

150

C

Table 15. FMPLL Electrical Specifications1

(VDDSYN = 3.0 V to 3.6 V, VSS =VSSSYN =0 V, TA =TL to TH)

1 All values given are initial design targets and subject to change.

Spec

Characteristic

Symbol

Min

Max

Unit

PLL Reference Frequency Range2 (Normal Mode)

Crystal Reference (PLLCFG2 = 0b0)

Crystal Reference (PLLCFG2 = 0b1)

External Reference (PLLCFG2 = 0b0)

External Reference (PLLCFG2 = 0b1)

2 Crystal and External reference frequency limits depend on device relying on PLL to lock prior to release of reset, default

PREDIV/EPREDIV, MFD/EMFD default settings, and VCO frequency range. Absolute minimum loop frequency is 4 MHz.

fref_crystal

fref_ext

403

3 Upper tolerance of less than 1% is allowed on 40MHz crystal.

MHz

Loss of Reference Frequency4

4 “Loss of Reference Frequency” is the reference frequency detected internally, which transitions the PLL into self clocked mode.

fLOR

100

1000

kHz

Self Clocked Mode Frequency5

5 Self clocked mode frequency is the frequency that the PLL operates at when the reference frequency falls below f

LOR. This

frequency is measured at D_CLKOUT. A default RFD value of (0x05) is used in SCM mode, and the programmed MFD and

RFD values have no effect

fSCM

416

MHz

PLL Lock Time6

tLPLL

—

< 400

s

Duty Cycle of Reference 7

tDC

Frequency un-LOCK Range

fUL

–4.0

4.0

% fsys

Frequency LOCK Range

fLCK

–2.0

2.0

% fsys

D_CLKOUT Period Jitter8, 9 Measured at fSYS Max

Cycle-to-cycle Jitter

CJitter

–5

%fclkout

Peak-to-Peak Frequency Modulation Range Limit 10,11

(fsys Max must not be exceeded)

Cmod

%fsys

FM Depth Tolerance12

Cmod_err

–0.25

0.25

%fsys

VCO Frequency

fVCO

192

600

MHz

Modulation Rate Limits13

fmod

0.400

MHz

Predivider output frequency range14

fprediv

410

MHz

Table 14. DSPI LVDS pad specification (continued)

PXR40 Datasheet(PDF) 66 Page - Freescale Semiconductor, Inc

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