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QG5000XSL9TH Datasheet(PDF) 21 Page - Intel Corporation |
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QG5000XSL9TH Datasheet(HTML) 21 Page - Intel Corporation |
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21 / 458 page  Intel® 5000X Chipset Memory Controller Hub (MCH) Datasheet 21 Introduction § Figure 1-1. Intel® 5000X Chipset System Block Diagram P1 Intel®5000X Chipset MCH Intel®631xESB/632 xESB I/ O Controller Hub Intel®82563EB Network Connection ( Dual Port) PHY F B D D R F B D D R F B D D R F B D D R F B D D R F B D D R F B D D R F B D D R F B D D R F B D D R F B D D R F B D D R PCI-E X16 Graphics Port SM Buses F B D D R F B D D R F B D D R F B D D R Note: All PCI- Express bandwidth numbers are bi- directional 8 USB Ports GPIO Azalia or AC’97 3 codec support 6 SATA Ports 1 PATA Port Clock Generator PCI-E x4Bus PCI- X 133Bus PCI32/ 33Bus Power Management PCI-E x4Bus RJ45 RJ45 SIO Flash BIOS P2 Channel1 5.3 GB/s Channel2 GB/s Channel3 . 5.3 GB/s Channel0 5.3GB/s 4 PCI-E X4 4GB/s 1066/1333 MTS System Bus MTS System Bus PCI-E x4 2GB/s PCI-E x4 2GB/s ESI 2GB/s 5.3 Note: FBD Bandwidth numbers are for FBD 4.0GHz/667MHz. 1066/1333 |
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