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MPC5604E Datasheet(PDF) 3 Page - Freescale Semiconductor, Inc |
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MPC5604E Datasheet(HTML) 3 Page - Freescale Semiconductor, Inc |
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3 / 75 page ![]() Overview MPC5604E Microcontroller Data Sheet, Rev. 4 Freescale Semiconductor 3 1 Overview This document provides electrical specifications, pin assignments, and package diagrams for the MPC5604E series of microcontroller units (MCUs). MPC5604E microcontrollers are members of a new family of next generation microcontrollers built on the Power Architecture. This document describes the features of the family and options available within the family members, and highlights important electrical and physical characteristics of the devices. The MPC5604E microcontroller is a gateway system designed to move data from different sources via Ethernet to a receiving system and vice versa. The supported data sources and sinks are: • Video data (with 8/10/12 bits per data word) • Audio data (6 stereo channels) • RADAR data (2 12 bit with <1s per sample, digitized externally and read in via SPI) • Other serial communication interfaces including CAN, LIN, and SPI The Ethernet module has a bandwidth of 10/100 Mbits/sec and supports precision time stamps (IEEE1588). Unshielded twisted pair cables are used to transfer data (via Ethernet) in the car, resulting in a significant reduction of wiring costs by providing inexpensive high bandwidth data links. 1.1 Device summary Table 1 summarizes the MPC5604E device. NOTE The 100-pin package is not a production package. It is used for software development only. Table 1. Device summary Feature MPC5604E 100-pin LQFP1 64-pin LQFP CPU e200z0h, 64 MHz, VLE only, no SPE Flash with ECC CFlash: 512 KB (LC) DFlash: 64 KB (LC, area optimized) RAM with ECC 96 KB DMA 16 channels PIT yes SWT yes FCU yes Ethernet 100 Mbits MII 100 Mbits MII-Lite Video Encoder 8bpp/12bpp Audio Interface 6x Stereo (4x synchronous + 2x synchronous/asynchronous) ADC (10-bit) 1 4 channels + V DD_IO + VDDCore + TSens + VGate Current 2 Timer I/O (eTimer) 1 6 channels SCI (LINFlex) 2 SPI (DSPI) DSPI_0: 2 chip selects DSPI_1: 2 chip selects DSPI_2: 4 chip selects |
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