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MPC5604E Datasheet(PDF) 1 Page - Freescale Semiconductor, Inc |
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MPC5604E Datasheet(HTML) 1 Page - Freescale Semiconductor, Inc |
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1 / 75 page  Freescale Semiconductor Data Sheet: Advance Information Document Number: MPC5604E Rev. 4, Jan 2012 © Freescale Semiconductor, Inc., 2012. All rights reserved. This document contains information on a product under development. Freescale reserves the right to change or discontinue this product without notice. MPC5604E 100 LQFP 14 mm x 14 mm 64 LQFP 10 mm x 10 mm • Single issue, 32-bit CPU core complex (e200z0h) — Compliant with Power Architecture® embedded category — Variable Length Encoding (VLE) only •Memory — 512 KB on-chip Code Flash with ECC and erase/program controller — additional 64 (4 × 16) KB on-chip Data Flash with ECC for EEPROM emulation — 96 KB on-chip SRAM with ECC • Fail-safe protection — Programmable watchdog timer — Non-maskable interrupt — Fault collection unit • Nexus 2+ interface • Interrupts and events — 16-channel eDMA controller — 16 priority level controller — Up to 32 external interrupts — PIT implements four 32-bit timers — 120 interrupts are routed via INTC • General purpose I/Os — Individually programmable as input, output or special function — 39 on LQFP64 — 71 on LQFP1001 • 1 general purpose eTimer unit — 6 timers each with up/down capabilities — 16-bit resolution, cascadeable counters — Quadrature decode with rotation direction flag 1.The 100-pin package is not a production package. It is used for software development only. — Double buffer input capture and output compare • Communications interfaces — 2 LINFlex channels (1 × Master/Slave, 1 × Master Only) — 3 DSPI controllers with automatic chip select generation (up to 2/2/4 chip selects) — 1 FlexCAN interface (2.0B Active) with 32 message buffers • One 10-bit analog-to-digital converter (ADC) — 8 input channels – 4 channels routed to the pins – 4 internal connections: 1x temperature sensor, 1x core voltage, 1x IO voltage, 1x VGate Current — Conversion time < 1 s including sampling time at full precision — 4 analog watchdogs with interrupt capability • On-chip CAN/UART bootstrap loader with Boot Assist Module (BAM) • On-chip TSENS • 100 MBit Fast Ethernet Controller (FEC) — Supports precision timestamps — MII on 100-pin LQFP package — MII-lite on 64-pin LQFP package • JPEG/MJPEG 8/12bit Encoder • 6 x stereo channels audio interface • 2x I2C controller module • CRC module MPC5604E Microcontroller Data Sheet |
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