MPC5604E datasheet(35/75 Pages) FREESCALE

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Electrical characteristics

MPC5604E Microcontroller Data Sheet, Rev. 4

Freescale Semiconductor

3.12

FMPLL electrical characteristics

1 The start-up time is dependent upon crystal characteristics, board leakage, etc., high ESR and excessive capacitive

loads can cause long start-up time.

2 Value captured when amplitude reaches 90% of XTAL

Table 18. Input clock characteristics

Symbol

Parameter

Min

Typ

Max

Unit

fOSC

SR Oscillator frequency

—

MHz

fCLK

SR Frequency in bypass

—

100

MHz

trCLK

SR Rise/fall time in bypass

—

tDC

SR Duty cycle

47.5

52.5

Table 19. PLLMRFM electrical specifications1

(VDDPLL = 3.0 V to 3.6 V, VSS = VSSPLL = 0 V, TA = TL to TH)

Symbol

Parameter

Conditions

Value

Unit

Min

Max

fref_crystal

fref_ext

PLL reference frequency range2

Crystal reference

MHz

fpll_in

Phase detector input frequency range

(after pre-divider)

—4

MHz

fFMPLLO

Clock frequency range in normal

mode

—

120

MHz

fVCO

VCO free running frequency

Measured using

clock

division—typicall

y /16

150

MHz

fsys

On-chip PLL frequency2

—16

MHz

tCYC

System clock period

—

1 / fsys

fSCM

Self-clocked mode frequency3,4

—

150

MHz

CJITTER

TCLKOUT

period

jitter5,6,7,8

Peak-to-peak (clock

edge to clock edge)

fSYS maximum

500

Long-term jitter (avg.

over 2 ms interval)

–6

tlpll

PLL lock time 9, 10

—

200

s

tdc

Duty cycle of reference

—40

fLCK

Frequency LOCK range

—

–6

% fsys

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