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IA6805E2-PDW40I-R-00 Datasheet(PDF) 21 Page - InnovASIC, Inc |
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IA6805E2-PDW40I-R-00 Datasheet(HTML) 21 Page - InnovASIC, Inc |
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21 / 33 page ![]() IA6805E2 29 August 2007 Microprocessor Unit As of Production Version 00 Bit Manipulation Instructions: The MPU is capable of altering any bits residing in the first 256 bytes of memory. An additional feature allows the software to test and branch on the state of any bit within these locations. For test and branch instructions the value of the bit tested is placed in the carry bit of the condition code register. Function Mnemonic n = 0…7 Branch if bit n set BRSET n Branch if bit n clear BRCLR n Set bit n BSET n Clear bit n BCLR n Branch Instructions: If a specific condition is met, the instruction branches. If not, no operation is performed. Function Mnemonic Branch always BRA Branch never BRN Branch if higher BHI Branch if lower or same BLS Branch if carry clear BCC Branch if higher or same BHS Branch if carry set BCS Branch if lower BLO Branch if not equal BNE Branch if equal BEQ Branch if half carry clear BHCC Branch if half carry set BHCS Branch if plus BPL Branch if minus BMI Branch if interrupt mask bit clear BMC Branch if interrupt mask bit set BMS Branch if interrupt line low BIL Branch if interrupt line high BIH Branch to subroutine BSR Copyright © 2007 IA211081401-03 www.Innovasic.com Customer Support: Page 21 of 33 1-888-824-4184 © |
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