MSP430F6776IPZ datasheet(70/157 Pages) TI

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ECCN 5E002 TSPA - Technology / Software Publicly Available

MSP430F677x

MSP430F676x

MSP430F674x

SLAS768C – SEPTEMBER 2012 – REVISED APRIL 2013

www.ti.com

PMM, SVS Low Side

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SVSLE = 0, PMMCOREV = 2

I(SVSL)

SVSL current consumption

SVSLE = 1, PMMCOREV = 2, SVSLFP = 0

200

SVSLE = 1, PMMCOREV = 2, SVSLFP = 1

1.5

µA

SVSLE = 1, dVCORE/dt = 10 mV/µs, SVSLFP = 1

2.5

tpd(SVSL)

SVSL propagation delay

µs

SVSLE = 1, dVCORE/dt = 1 mV/µs, SVSLFP = 0

SVSLE = 0

→ 1, dVCORE/dt = 10 mV/µs,

12.5

SVSLFP = 1

t(SVSL)

SVSL on or off delay time

µs

SVSLE = 0

→ 1, dVCORE/dt = 1 mV/µs,

100

SVSLFP = 0

PMM, SVM Low Side

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SVMLE = 0, PMMCOREV = 2

I(SVML)

SVML current consumption

SVMLE = 1, PMMCOREV = 2, SVMLFP = 0

200

SVMLE = 1, PMMCOREV = 2, SVMLFP = 1

1.5

µA

SVMLE = 1, dVCORE/dt = 10 mV/µs, SVMLFP = 1

2.5

tpd(SVML)

SVML propagation delay

µs

SVMLE = 1, dVCORE/dt = 1 mV/µs, SVMLFP = 0

SVMLE = 0

→ 1, dVCORE/dt = 10 mV/µs,

12.5

SVMLFP = 1

t(SVML)

SVML on or off delay time

µs

SVMLE = 0

→ 1, dVCORE/dt = 1 mV/µs,

100

SVMLFP = 0

Wake-Up From Low-Power Modes and Reset

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Wake-up time from LPM2,

PMMCOREV = SVSMLRRL = n

fMCLK ≥ 4.0 MHz

tWAKE-UP-FAST

LPM3, or LPM4 to active

(where n = 0, 1, 2, or 3),

µs

fMCLK < 4.0 MHz

mode(1)

SVSLFP = 1

Wake-up time from LPM2,

PMMCOREV = SVSMLRRL = n

tWAKE-UP-SLOW

LPM3 or LPM4 to active

(where n = 0, 1, 2, or 3),

150

165

µs

mode(2)

SVSLFP = 0

Wake-up time from LPM4.5 to

tWAKE-UP-LPM4.5

active mode(3)

Wake-up time from RST or

tWAKE-UP-RESET

BOR event to active mode(3)

(1)

This value represents the time from the wakeup event to the first active edge of MCLK. The wakeup time depends on the performance

mode of the low side supervisor (SVSL) and low side monitor (SVML). Fastest wakeup times are possible with SVSLand SVML in full

performance mode or disabled when operating in AM, LPM0, and LPM1. Various options are available for SVSLand SVML while

operating in LPM2, LPM3, and LPM4. See the Power Management Module and Supply Voltage Supervisor chapter in the MSP430x5xx

and MSP430x6xx Family User's Guide (SLAU208).

(2)

This value represents the time from the wakeup event to the first active edge of MCLK. The wakeup time depends on the performance

mode of the low side supervisor (SVSL) and low side monitor (SVML). In this case, the SVSLand SVML are in normal mode (low current)

mode when operating in AM, LPM0, and LPM1. Various options are available for SVSLand SVML while operating in LPM2, LPM3, and

LPM4. See the Power Management Module and Supply Voltage Supervisor chapter in the MSP430x5xx and MSP430x6xx Family User's

Guide (SLAU208).

(3)

This value represents the time from the wakeup event to the reset vector execution.

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