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MSP430F6776IPZ Datasheet(PDF) 85 Page - Texas Instruments |
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MSP430F6776IPZ Datasheet(HTML) 85 Page - Texas Instruments |
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85 / 157 page ![]() ECCN 5E002 TSPA - Technology / Software Publicly Available MSP430F677x MSP430F676x MSP430F674x www.ti.com SLAS768C – SEPTEMBER 2012 – REVISED APRIL 2013 SD24_B, AC Performance fSD24 = 1 MHz, SD24OSRx = 256, SD24REFON = 1 PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT SD24GAIN: 1 3 V 84 86 SD24GAIN: 2 3 V 85 SD24GAIN: 4 3 V 84 SD24GAIN: 8 3 V 81 83 Signal-to-noise + SINAD fIN = 50Hz (1) dB distortion ratio SD24GAIN: 16 3 V 80 SD24GAIN: 32 3 V 71 73 SD24GAIN: 64 3 V 67 SD24GAIN: 128 3 V 61 SD24GAIN: 1 3 V 95 THD Total harmonic distortion SD24GAIN: 8 fIN = 50Hz (1) 3 V 90 dB SD24GAIN: 32 3 V 86 (1) The following voltages were applied to the SD24_B inputs: VI,A+(t) = 0 V + VPP/2 × sin(2π × fIN × t) and VI,A-(t) = 0 V - VPP/2 × sin(2π × fIN × t) resulting in a differential voltage of VID = VI,A+(t) - VI,A-(t) = VPP × sin(2π × fIN × t) with VPP being selected as the maximum value allowed for a given range (according to SD24_B recommended operating conditions). SD24_B, AC Performance fSD24 = 2 MHz, SD24OSRx = 512, SD24REFON = 1 PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT SD24GAIN: 1 3 V 87 SD24GAIN: 2 3 V 85 SD24GAIN: 4 3 V 84 SD24GAIN: 8 3 V 83 Signal-to-noise + SINAD fIN = 50Hz (1) dB distortion ratio SD24GAIN: 16 3 V 81 SD24GAIN: 32 3 V 76 SD24GAIN: 64 3 V 71 SD24GAIN: 128 3 V 65 (1) The following voltages were applied to the SD24_B inputs: VI,A+(t) = 0 V + VPP/2 × sin(2π × fIN × t) and VI,A-(t) = 0 V - VPP/2 × sin(2π × fIN × t) resulting in a differential voltage of VID = VI,A+(t) - VI,A-(t) = VPP × sin(2π × fIN × t) with VPP being selected as the maximum value allowed for a given range (according to SD24_B recommended operating conditions). SD24_B, AC Performance fSD24 = 32 kHz, SD24OSRx = 512, SD24REFON = 1 PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT SD24GAIN: 1 3 V 89 SD24GAIN: 2 3 V 85 SD24GAIN: 4 3 V 84 SD24GAIN: 8 3 V 82 Signal-to-noise + SINAD fIN = 50Hz (1) dB distortion ratio SD24GAIN: 16 3 V 80 SD24GAIN: 32 3 V 76 SD24GAIN: 64 3 V 67 SD24GAIN: 128 3 V 61 (1) The following voltages were applied to the SD24_B inputs: VI,A+(t) = 0 V + VPP/2 × sin(2π × fIN × t) and VI,A-(t) = 0 V - VPP/2 × sin(2π × fIN × t) resulting in a differential voltage of VID = VI,A+(t) - VI,A-(t) = VPP × sin(2π × fIN × t) with VPP being selected as the maximum value allowed for a given range (according to SD24_B recommended operating conditions). Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 85 |
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