ADM1026JSTZ-R7 datasheet(40/55 Pages) ONSEMI

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Table 25. REGISTER 0BH, GPIO CONFIGURATION REGISTER 4 (POWER-ON DEFAULT 00H)

Bit

Name

R/W

Description

GPIO12 Direction

R/W

When this bit is 0, GPIO12 is configured as an input; otherwise, it is an output.

GPIO12 Polarity

R/W

When this bit is 0, GPIO12 is active low; otherwise, it is active high.

GPIO13 Direction

R/W

When this bit is 0, GPIO13 is configured as an input; otherwise, it is an output.

GPIO13 Polarity

R/W

When this bit is 0, GPIO13 is active low; otherwise, it is active high.

GPIO14 Direction

R/W

When this bit is 0, GPIO14 is configured as an input; otherwise, it is an output.

GPIO14 Polarity

R/W

When this bit is 0, GPIO14 is active low; otherwise, it is active high.

GPIO15 Direction

R/W

When this bit is 0, GPIO15 is configured as an input; otherwise, it is an output.

GPIO15 Polarity

R/W

When this bit is 0, GPIO15 is active low; otherwise, it is active high.

Table 26. REGISTER 0CH, EEPROM CONFIGURATION REGISTER 2 (POWER-ON DEFAULT 00H)

Bit

Name

R/W

Description

7–0

Factory Use

For factory use only. Do not write to this register.

Table 27. REGISTER 0DH, INTERNAL TEMPERATURE THERM LIMIT (POWER-ON DEFAULT, 37H 555C)

Bit

Name

R/W

Description

7–0

Int Temp THERM Limit

R/W

This register contains the THERM limit for the internal temperature channel.

Exceeding this limit causes the THERM output pin to be asserted.

Table 28. REGISTER 0EH, TDM1 THERM LIMIT (POWER-ON DEFAULT, 50H 805C)

Bit

Name

R/W

Description

7–0

TDM1 THERM Limit

R/W

This register contains the THERM limit for the TDM1 temperature channel.

Exceeding this limit causes the THERM output pin to be asserted.

Table 29. REGISTER 0FH, TDM2 THERM LIMIT (POWER-ON DEFAULT, 50H 805C)

Bit

Name

R/W

Description

7–0

TDM2 THERM Limit

R/W

This register contains the THERM limit for the TDM2 temperature channel.

Exceeding this limit causes the THERM output pin to be asserted.

Table 30. REGISTER 10H, INTERNAL TEMPERATURE TMIN (POWER-ON DEFAULT, 28H 405C)

Bit

Name

R/W

Description

7–0

Internal Temp TMIN

R/W

This register contains the TMIN value for automatic fan speed control based on the

internal temperature channel.

Table 31. REGISTER 11H, TDM1 TEMPERATURE TMIN (POWER-ON DEFAULT, 40H 645C)

Bit

Name

R/W

Description

7–0

TDM1 Temp TMIN

R/W

This register contains the TMIN value for automatic fan speed control based on the

TDM1 temperature channel.

Table 32. REGISTER 12H, TDM2 TEMPERATURE TMIN (POWER-ON DEFAULT, 40H 645C)

Bit

Name

R/W

Description

7–0

TDM2 Temp TMIN

R/W

This register contains the TMIN value for automatic fan speed control based on the

TDM2 temperature channel.

ADM1026JSTZ-R7 Datasheet(PDF) 40 Page - ON Semiconductor

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