PIC18F4550ESOSQTP datasheet(422/430 Pages) MICROCHIP

422 / 430 page

PIC18F2455/2550/4455/4550

DS39632D-page 420

Preliminary

STATUS ..................................................................... 71

STKPTR (Stack Pointer) ............................................ 59

T0CON (Timer0 Control) .......................................... 125

T1CON (Timer1 Control) .......................................... 129

T2CON (Timer2 Control) .......................................... 135

T3CON (Timer3 Control) .......................................... 137

TXSTA (Transmit Status and Control) ..................... 238

UCFG (USB Configuration) ...................................... 166

UCON (USB Control) ............................................... 164

UEIE (USB Error Interrupt Enable) .......................... 182

UEIR (USB Error Interrupt Status) ........................... 181

UEPn (USB Endpoint n Control) .............................. 169

UIE (USB Interrupt Enable) ...................................... 180

UIR (USB Interrupt Status) ...................................... 178

USTAT (USB Status) ............................................... 168

WDTCON (Watchdog Timer Control) ....................... 298

RESET ............................................................................. 337

Reset State of Registers .................................................... 50

Resets ........................................................................ 43, 285

Brown-out Reset (BOR) ........................................... 285

Oscillator Start-up Timer (OST) ............................... 285

Power-on Reset (POR) ............................................ 285

Power-up Timer (PWRT) ......................................... 285

RETFIE ............................................................................ 338

RETLW ............................................................................. 338

RETURN .......................................................................... 339

Return Address Stack ........................................................ 58

and Associated Registers .......................................... 58

Return Stack Pointer (STKPTR) ........................................ 59

Revision History ............................................................... 409

RLCF ................................................................................ 339

RLNCF ............................................................................. 340

RRCF ............................................................................... 340

RRNCF ............................................................................. 341

SCK .................................................................................. 193

SDI ................................................................................... 193

SDO ................................................................................. 193

SEC_IDLE Mode ................................................................ 40

SEC_RUN Mode ................................................................ 36

Serial Clock, SCK ............................................................. 193

Serial Data In (SDI) .......................................................... 193

Serial Data Out (SDO) ..................................................... 193

Serial Peripheral Interface. See SPI Mode.

SETF ................................................................................ 341

Slave Select (SS) ............................................................. 193

SLEEP .............................................................................. 342

Sleep

OSC1 and OSC2 Pin States ...................................... 33

Sleep Mode ........................................................................ 39

Software Simulator (MPLAB SIM) .................................... 358

Special Event Trigger. See Compare (CCP Module).

Special Event Trigger. See Compare (ECCP Module).

Special Features of the CPU ............................................ 285

Special ICPORT Features ................................................ 305

SPI Mode (MSSP)

Associated Registers ............................................... 201

Bus Mode Compatibility ........................................... 201

Effects of a Reset ..................................................... 201

Enabling SPI I/O ...................................................... 197

Master Mode ............................................................ 198

Master/Slave Connection ......................................... 197

Operation ................................................................. 196

Operation in Power-Managed Modes ...................... 201

Serial Clock .............................................................. 193

Serial Data In ........................................................... 193

Serial Data Out ........................................................ 193

Slave Mode .............................................................. 199

Slave Select ............................................................. 193

Slave Select Synchronization .................................. 199

SPI Clock ................................................................. 198

Typical Connection .................................................. 197

SPP. See Streaming Parallel Port.

SS .................................................................................... 193

SSPOV ............................................................................ 227

SSPOV Status Flag ......................................................... 227

SSPSTAT Register

R/W Bit .................................................................... 209

SSPxSTAT Register

R/W Bit .................................................................... 207

Stack Full/Underflow Resets .............................................. 60

STATUS Register .............................................................. 71

Streaming Parallel Port .................................................... 187

Associated Registers ............................................... 192

Clocking Data .......................................................... 188

Configuration ........................................................... 187

Internal Pull-ups ....................................................... 188

Interrupts ................................................................. 190

Microcontroller Control Setup .................................. 190

Reading from (Microcontroller Mode) ...................... 191

Transfer of Data Between USB SIE

and SPP (diagram) .......................................... 190

USB Control Setup .................................................. 190

Wait States .............................................................. 188

Writing to (Microcontroller Mode) ............................. 190

SUBFSR .......................................................................... 353

SUBFWB ......................................................................... 342

SUBLW ............................................................................ 343

SUBULNK ........................................................................ 353

SUBWF ............................................................................ 343

SUBWFB ......................................................................... 344

SWAPF ............................................................................ 344

T0CON Register

PSA Bit .................................................................... 127

T0CS Bit .................................................................. 126

T0PS2:T0PS0 Bits ................................................... 127

T0SE Bit .................................................................. 126

Table Pointer Operations (table) ........................................ 82

Table Reads/Table Writes ................................................. 60

TBLRD ............................................................................. 345

TBLWT ............................................................................. 346

Time-out in Various Situations (table) ................................ 47

Timer0 .............................................................................. 125

16-Bit Mode Timer Reads and Writes ...................... 126

Associated Registers ............................................... 127

Clock Source Edge Select (T0SE Bit) ..................... 126

Clock Source Select (T0CS Bit) ............................... 126

Operation ................................................................. 126

Overflow Interrupt .................................................... 127

Prescaler ................................................................. 127

Switching Assignment ..................................... 127

Prescaler. See Prescaler, Timer0.

Timer1 .............................................................................. 129

16-Bit Read/Write Mode .......................................... 131

Associated Registers ............................................... 133

Interrupt ................................................................... 132

Operation ................................................................. 130

PIC18F4550ESOSQTP Datasheet(PDF) 422 Page - Microchip Technology

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