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AS3517H-ECTP Datasheet(PDF) 89 Page - ams AG

Part # AS3517H-ECTP
Description  Stereo Audio Codec with enhanced System Power Management
PDF  94 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS3517H-ECTP Datasheet(HTML) 89 Page - ams AG

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AS3517 V17
Data Sheet, Confidential
© 2003-2007, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Table 90 Fifth Interupt Register
Name
Base
Default
IRQ_ENRD_4
2-wire serial
0x00
Fifth Interrupt Register
Offset: 27h
Please be aware that writing to this register will enable/disable the corresponding
interrupts, while with reading you get the actual interrupt status and will clear the
register at the same time. It is not possible to read back the interrupt enable/disable
settings. This register is reset at a DVDD-POR.
Bit
Bit Name
Default
Access
Bit Description
7:6
T_DEB<1:0>
00
R/W
Sets the USB and Charger connect de-bounce time:
00: 340ms
01: 170ms
10: 85ms
11: 4ms
5
XIRQ_AH
0
R/W
Sets the active output state of the XIRQ line:
0: IRQ is active low
1: IRQ is active high
4
XIRQ_PP
0
R/W
Sets the XIRQ output buffer type:
0: IRQ output is open drain
1: IRQ output is push pull
0
W
Microphone 2 remote key press detection interrupt setting
0: disable
1: enable
3
REM2_DET
(edge)
x
R
Microphone 2 remote key press detection interrupt reading
0: no key press detected
1: Microphone 2 supply current got increased, remote key
press detected -> measure MICS supply current
0
W
Microphone 1 remote key press detection interrupt setting
0: disable
1: enable
2
REM1_DET
(edge)
x
R
Microphone 1 remote key press detection interrupt reading
0: no key press detected
1: Microphone 1 supply current got increased, remote key
press detected -> measure MICS supply current
0
W
RTC timer interrupt setting
0: disable
1: enable
1
RTC_UPDATE
(edge)
x
R
RTC timer interrupt reading
0: no RTC interrupt occurred
1: RTC timer interrupt occurred. Selecting minute or second
interrupt can be done via RTCT register (29h)
0
W
ADC end of conversion interrupt setting
0: disable
1: enable
0
ADC_EOC
(edge)
x
R
ADC end of conversion interrupt reading
0: ADC conversion not finished
1: ADC conversion finished. Read out ADC_0 and ADC_1
register to get the result (2Eh & 2Fh)
Revision 1v3
88
- 93



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