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AS3517H-ECTP Datasheet(PDF) 26 Page - ams AG

Part # AS3517H-ECTP
Description  Stereo Audio Codec with enhanced System Power Management
PDF  94 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

AS3517H-ECTP Datasheet(HTML) 26 Page - ams AG

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AS3517 V17
Data Sheet, Confidential
© 2003-2007, austriamicrosystems AG, 8141 Unterpremstaetten, Austria-Europe. All Rights Reserved.
www.austriamicrosystems.com
Table 20Table 21
I2S Master clock PLL settings
fOSC
fsample (LRCK)
PLL-Mode
RD (Rate Divider)
Deviation
24MHz
48.00kS
1
123
0.00%
24MHz
44.10kS
1
134
0.04%
24MHz
32.00kS
1
186
-0.27%
24MHz
24.00kS
1
248
0.00%
24MHz
22.05kS
1
270
0.04%
24MHz
16.00kS
1
373
0.00%
24MHz
12.00kS
2
248
0.00%
24MHz
11.025kS
2
270
0.04%
24MHz
8.00kS
2
373
0.00%
fOSC
fsample (LRCK)
PLL-Mode
RD (Rate Divider)
Deviation
16MHz
48.00kS
1
81
0.40%
16MHz
44.10kS
1
179
-0.33%
16MHz
32.00kS
1
123
0.00%
16MHz
24.00kS
1
165
-0.20%
16MHz
22.05kS
1
179
0.22%
16MHz
16.00kS
1
248
0.00%
16MHz
12.00kS
2
165
-0.20%
16MHz
11.025kS
2
179
0.22%
16MHz
8.00kS
2
248
0.00%
fOSC
fsample (LRCK)
PLL-Mode
RD (Rate Divider)
Deviation
12MHz
48.00kS
1
61
-0.79%
12MHz
44.10kS
1
66
0.04%
12MHz
32.00kS
1
92
0.27%
12MHz
24.00kS
1
123
0.00%
12MHz
22.05kS
1
134
0.04%
12MHz
16.00kS
1
185
0.27%
12MHz
12.00kS
2
123
0.00%
12MHz
11.025kS
2
134
0.04%
12MHz
8.00kS
2
185
0.27%
Parameter
Figure 10 I2S Left Justified Mode
Revision 1v3
25
- 93



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