AN3392 datasheet(24/57 Pages) STMICROELECTRONICS

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Voltage regulation

AN3392

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Doc ID 018749 Rev 1

Figure 22.

Frame structure: register read operation

The SPV1020 register file is accessible by the host through the SPI bus. Therefore, the host

can read some registers of the SPV1020 control parameters. Each data frame includes at

least one command byte followed by some data bytes whose direction depends on the type

of command. If the command byte requires some data to be read from the register file, those

data are transmitted from the slave to the master through the MISO pin; therefore the master

appends a number of NOPs (0x00) to the command, so that the entire data can be

transmitted, see Figure 22. In other words, the master must transmit a byte to receive a byte.

If the SS wire goes high before the completion of a command byte in the data frame, the

SPV1020 rejects that byte and the frame is closed; then the next data frame is considered

as a new one, starting with a command byte.

Some data words can be longer than 8 bits, such as ADC results (10 bits); in such cases,

data is first extended to the nearest multiple of one byte (it is right justified), then it is split

into bytes, e.g. the ADC result R is formatted as follows:

Table 1.

Data format for words longer than 8 bits

Bit 7

MSB

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

LSB

Byte 1

MSB

Byte 2

R6R5

R4R3

R2R1

LSB

AN3392 Datasheet(PDF) 24 Page - STMicroelectronics