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AN3392 Datasheet(PDF) 34 Page - STMicroelectronics |
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AN3392 Datasheet(HTML) 34 Page - STMicroelectronics |
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34 / 57 page ![]() External component selection AN3392 34/57 Doc ID 018749 Rev 1 Critical parameters for capacitors are: capacitance, maximum voltage and ESR. Maximum voltage of this capacitor is strictly dependent upon the output voltage range. The SPV1020 can support up to 40 V. The minimum suggested voltage for these capacitors is 50 V. Low ESR capacitors are a good choice in order to increase the entire system efficiency. The suggested minimum output capacitance is 28 µF. In the case of series connection (see Appendix B: SPV1020 parallel and series connection), it is suggested to increase the output capacitance up to 100 µF. In order to reduce the ESR effect it is suggested to split the output capacitance into three capacitors connected in parallel. In accordance with the maximum current (Isc) provided by the PV panel connected at the input, the following formula can be used in order to select the proper capacitance value (Cout) for a specified maximum output voltage ripple (Vout_rp_max): Equation 20 It is suggested to split the capacitance into four capacitors, each to be connected to each of the four VOUT pins of the SPV1020. This helps to balance the impedance of the four tracks. 10.9 Output voltage partitioning R3 and R4 are the two resistors used for partitioning the output voltage. If VOUT_MAX is the maximum output voltage at the load, then R3 and R4 must be selected according to the following rule: Equation 21 Also, in order to optimize the efficiency of the entire system, when selecting R3 and R4, their power dissipation must be taken into account. Assuming negligible current flowing through pin VOUT_SNS, maximum power dissipation in the series connection of R3 and R4 is: Equation 22 Empirically, R3 and R4 should be selected according to: Equation 23 C out I sc V out_rp-max F SW ⋅ ---------------------------------------------- ≥ R3 R4 -------- V out_max 1.00 ---------------------- 1 – = P vout_sns V out_max () R3 R4 + ---------------------------- 2 = P vout_sns 1% V out_max I out_max ⋅ () « |
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