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AN394 - APPLICATION NOTE

In applications where D and Q are tied together, this may again create bus conflicts. Therefore, it is rec-

ommended that this status signal be cancelled as soon as possible: this can be achieved very simply by

applying a single clock pulse on the C input while S is high, as depicted in Figure 11.

The operation is scheduled as follows:

– shift the write command into the chip

– bring S low for the minimum period of tSLSH

– bring S high

– monitor the D/Q bus until a high level (Ready) is detected

–clock C once

– bring S low

– the chip is now ready to accept the next instruction

It should also be noted that, on power-up, the Ready/Busy status be initially in the active state. Therefore,

it is recommended to clock C once (with S = 1) prior to the issue of the first command.

IMPROVING ON THE CALCULATIONS IN THIS DOCUMENT

This document has discussed how MICROWIRE devices can be used in a configuration in which the D

and Q lines are tied together as a single bus. For safety, and for generality, the worst case and most con-

servative conditions have been assumed in all calculations.

In particular circumstances, however, it might be possible for the designer to do better than this. In the

designer’s own particular application, it might be reasonable to rule out some worst-case situations as nev-

er occurring, and to adapt the calculations accordingly.