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PCS3P623Z09B Datasheet(PDF) 6 Page - ON Semiconductor |
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PCS3P623Z09B Datasheet(HTML) 6 Page - ON Semiconductor |
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6 / 13 page ![]() PCS3P623Z05A, PCS3P623Z05B, PCS3P623Z09A, PCS3P623Z09B http://onsemi.com 6 Table 7. ELECTRICAL CHARACTERISTICS Parameter Description Test Conditions Min Typ Max Unit VIL Input LOW Voltage (Note 11) 0.8 V VIH Input HIGH Voltage (Note 11) 2.0 V IIL Input LOW Current VIN = 0 V 50 mA IIH Input HIGH Current VIN = VDD 100 mA VOL Output LOW Voltage (Note 12) IOL = 8 mA 0.4 V VOH Output HIGH Voltage (Note 12) IOH = −8 mA 2.4 V IDD Supply Current Unloaded outputs 27 mA Zo Output Impedance 23 W 11. CLKIN input has a threshold voltage of VDD/2 12.Parameter is guaranteed by design and characterization. Not 100% tested in production. Table 8. SWITCHING CHARACTERISTICS Parameter Test Conditions Min Typ Max Unit Input Frequency 20 50 MHz Output Frequency 30 pF load 20 50 MHz Duty Cycle = (t2 / t1) * 100 (Notes 13, 14) Measured at VDD/2 40 50 60 % Output Rise Time (Notes 13, 14) Measured between 0.8 V and 2.0 V 2.5 nS Output Fall Time (Notes 13, 14) Measured between 2.0 V and 0.8 V 2.5 nS Output−to−output skew (Notes 13, 14) All outputs equally loaded 250 pS Delay, CLKIN Rising Edge to CLKOUT Rising Edge (Note 14) Measured at VDD/2 ±350 pS Device−to−Device Skew (Note 14) Measured at VDD/2 on the CLKOUT pins of the device 700 pS Cycle−to−Cycle Jitter (Notes 13, 14) Loaded outputs ±250 pS PLL Lock Time (Note 14) Stable power supply, valid clock presented on CLKIN pin 1.0 mS 13.All parameters specified with 30 pF loaded outputs. 14.Parameter is guaranteed by design and characterization. Not 100% tested in production. |
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