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PCS3P623Z09B Datasheet(PDF) 3 Page - ON Semiconductor |
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PCS3P623Z09B Datasheet(HTML) 3 Page - ON Semiconductor |
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3 / 13 page ![]() PCS3P623Z05A, PCS3P623Z05B, PCS3P623Z09A, PCS3P623Z09B http://onsemi.com 3 Pin Configuration for PCS3P623Z05A/B 8 7 6 5 DLY_CTRL CLKOUT4 VDD CLKOUT3 1 2 3 4 CLKIN CLKOUT1 CLKOUT2 GND PCS3P623Z05A/B Table 1. PIN DESCRIPTION FOR PCS3P623Z05A/B Pin # Pin Name Type Description 1 CLKIN (Note 1) I External reference Clock input, 5 V tolerant input 2 CLKOUT1 (Note 2) O Buffered clock output (Note 4) 3 CLKOUT2 (Note 2) O Buffered clock output (Note 4) 4 GND P Ground 5 CLKOUT3 (Note 2) O Buffered clock output (Note 4) 6 VDD P 3.3 V supply 7 CLKOUT4 (Note 2) O Buffered clock output (Note 4) 8 DLY_CTRL O External Input−Output Delay control. This pin can be used as clock output (Note 4) 1. Weak pull down 2. Weak pull−down on all outputs 3. Weak pull−up on these Inputs 4. Buffered clock output is Timing−Safe |
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