Z86C2116FSC datasheet(31/35 Pages) ZILOG

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Z86C21 MCU

WITH

8K ROM

Address

Instruction

Mode

Opcode

Flags Affected

and Operation

dst src

Byte (Hex) C Z S V D H

STOP

------

SUB dst, src

†

2[ ]

TTTT 1 T

dst

←dst←src

SWAP dstRF0

X TT X-

TCM dst, src

†

6[ ]

TT 0-

(NOT dst)

AND src

TM dst, src

†

7[ ]

TT 0-

dst AND src

XOR dst, src

†

B[ ]

TT 0-

dst

←dst

XOR src

† These instructions have an identical set of addressing modes, which

are encoded for brevity. The first opcode nibble is found in the instruction

set table above. The second nibble is expressed symbolically by a ‘[ ]’

in this table, and its value is found in the following table to the left of the

applicable addressing mode pair.

For example, the opcode of an ADC instruction using the addressing

modes r (destination) and Ir (source) is 13.

Address Mode

Lower

dst

src

Opcode Nibble

[2]

[3]

[4]

[5]

[6]

[7]

INSTRUCTION SUMMARY (Continued)

Address

Instruction

Mode

Opcode

Flags Affected

and Operation

dst src

Byte (Hex) C Z S V D H

NOP

------

OR dst, src

†

4[ ]

TT 0-

dst

←dst OR src

POP dst

------

dst

←@SP;

←SP + 1

PUSH src

------

←SP – 1;

@SP

←src

RCF

-----

←0

RET

------

←@SP;

←SP + 2

RL dst

TTTT --

RLC dst

TTTT --

RR dst

TTTT --

RRC dst

TTTT --

SBC dst, src

†

3[ ]

TTTT 1 T

dst

←dst←src←C

SCF

-----

←1

SRA dst

TTT 0-

SRP src

------

←src

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