AX88796LF datasheet(33/71 Pages) ASIX

33 / 71 page

ASIX ELECTRONICS CORPORATION

AX88796 L

3-in-1 Local Bus Fast Ethernet Controller

PAGE 1 (PS1=0,PS0=1)

OFFSET

READ

WRITE

00H

Command Register

( CR )

Command Register

( CR )

01H

Physical Address Register 0

( PARA0 )

Physical Address Register 0

( PAR0 )

02H

Physical Address Register 1

( PARA1 )

Physical Address Register 1

( PAR1 )

03H

Physical Address Register 2

( PARA2 )

Physical Address Register 2

( PAR2 )

04H

Physical Address Register 3

( PARA3 )

Physical Address Register 3

( PAR3 )

05H

Physical Address Register 4

( PARA4 )

Physical Address Register 4

( PAR4 )

06H

Physical Address Register 5

( PARA5 )

Physical Address Register 5

( PAR5 )

07H

Current Page Register

( CPR )

Current Page Register

( CPR )

08H

Multicast Address Register 0

( MAR0 )

Multicast Address Register 0

( MAR0 )

09H

Multicast Address Register 1

( MAR1 )

Multicast Address Register 1

( MAR1 )

0AH

Multicast Address Register 2

( MAR2 )

Multicast Address Register 2

( MAR2 )

0BH

Multicast Address Register 3

( MAR3 )

Multicast Address Register 3

( MAR3 )

0CH

Multicast Address Register 4

( MAR4 )

Multicast Address Register 4

( MAR4 )

0DH

Multicast Address Register 5

( MAR5 )

Multicast Address Register 5

( MAR5 )

0EH

Multicast Address Register 6

( MAR6 )

Multicast Address Register 6

( MAR6 )

0FH

Multicast Address Register 7

( MAR7 )

Multicast Address Register 7

( MAR7 )

10H, 11H

Data Port

12H

Inter-frame Gap Segment 1

IFGS1

Inter-frame Gap Segment 1

IFGS1

13H

Inter-frame Gap Segment 2

IFGS2

Inter-frame Gap Segment 2

IFGS2

14H

MII/EEPROM Access

15H

Test Register

16H

Inter-frame Gap (IFG)

17H

GPI

GPOC

18H - 1AH

Standard Printer Port (SPP)

1BH - 1EH

Reserved

1FH

Reset

Reserved

Tab - 13 Page 1 of MAC Core Registers Mapping

AX88796LF Datasheet(PDF) 33 Page - ASIX Electronics Corporation

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