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BQ76PL536APAPR Datasheet(PDF) 65 Page - Texas Instruments |
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BQ76PL536APAPR Datasheet(HTML) 65 Page - Texas Instruments |
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65 / 74 page  BAT BAT VSS VSS VDD BIN SDA SCL GPOUT CVDD CBAT RSDA RBIN RSCL RGPOUT SDA SCL VDD VDD GPOUT VSYS Place close to gauge IC. Trace to pin and VSS should be short ,I EDWWHU\ SDFN¶V WKHUPLVWRU ZLOO not be connected to BIN pin, a 10-k pulldown resistor should be connected to the BIN pin. The BIN pin should not be shorted directly to VDD or VSS. Even is GPOUT is not used by host, the GPOUT pin should be pulled up NFET NFET Protection IC RTHERM Battery Pack PACK+ PACK- TS Li-Ion Cell + Via connects to Power Ground Kelvin connect the BAT pins with PACK+ connection on the battery pack bq76PL536A www.ti.com SLUSAD3B – JUNE 2011 – REVISED JANUARY 2016 10.2 Layout Example Figure 68. Layout Schematic Copyright © 2011–2016, Texas Instruments Incorporated Submit Documentation Feedback 65 Product Folder Links: bq76PL536A |
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