Load

Power

Converter

Vout

+

Vout -

Sense

-

Sense

+

GND

SHR

CSP

CSO

CSM

TRO

RSO

+ VRS -

TRIM

IT

Margining

control

circuit

RM1

RM2

RS1

1

/

0

. *

2

/

0

. *

10:

10 :

LM5080

CSP

20

R1

IT1

I

1

21 N

R2

æ

ö æ

ö

=

´

´

+

ç

÷ ç

÷

´

è

ø è

ø

SHR

22.5

R1

IT1

I

1

21 N

R2

æ

ö æ

ö

=

´

´

+

ç

÷ ç

÷

´

è

ø è

ø

NRND

LM5080

www.ti.com

SNVS387C – SEPTEMBER 2005 – REVISED MARCH 2013

VOLTAGE MARGINING

Shifting the output regulation voltage up or down by a small amount is referred to as voltage margining. In the

remote sense adjust modes and the feedback adjust modes, this can be done by connecting all of the power

converter TRIM pins together and injecting a positive or negative current. However, in the reference adjust mode,

the TRIM pin is used for current sharing. An alternative margining method is to inject a current into the SHR

share bus. This will simultaneously shift the regulation voltages of all power converter’s while maintaining equal

current sharing. The injected current is split equally between the LM5080’s SHR inputs and added to the TRIM

pin currents creating an equal offset voltage for all of the power converter references. The trim pin current

injected into each power converter’s reference (IT) is dependent on the magnitude of the total injected current

into the SHR bus (ISHR), the number of LM5080’s on the SHR bus (N) and any transconductance boost supplied

(R1 & R2):

An alternate method to shift the regulation voltage is to tie all the CSP pins together and inject a current into that

node. The trim pin current injected into each power converter’s reference (IT) attributed to the current injected

into the CSP node (ICSP) is derived to be:

Figure 18 shows a margining up and down application implemented using pull up resistors to VCC. Since the

SHR and CSP voltages are approximately 0.1 x VCC and 0.2 x VCC respectively, the injected current can be

independently controlled with RM1 and RM2.

Figure 18. One Method of Implementing Voltage Margining

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