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2016-01-0026

PT0561-2

02/15/16

11

PI4IOE5V9535

16-bit I

Write to Output port register

ii. Reading the port registers

In order to read data from the PI4IOE5V9535, the bus master must first send the PI4IOE5V9535 address with the least

significant bit set to a logic 0. The command byte is sent after the address and determines which register will be accessed. After a

restart, the device address is sent again, but this time the least significant bit is set to a logic 1. Data from the register defined by

the command byte will then be sent by the PI4IOE5V9535. Data is clocked into the register on the falling edge of the acknowledge

clock pulse. After the first byte is read, additional bytes may be read but the data will now reflect the information in the other

register in the pair. For example, if you read Input Port 1, then the next byte read would be Input Port 0. There is no limitation on

the number of data bytes received in one read transmission but the final byte received, the bus master must not acknowledge the

data.

Figure 7: Write to configuration registers

Figure 8: Read from registers

Note: Transfer can be stopped at any time by a STOP condition.