MCP3906AT-ISLASHSS datasheet(3/32 Pages) MICROCHIP

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DS22011B-page 3

MCP3905A/05L/06A

1.0

ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings †

VDD...................................................................................7.0V

Digital inputs and outputs w.r.t. AGND........ -0.6V to VDD +0.6V

Analog input w.r.t. AGND..................................... ....-6V to +6V

VREF input w.r.t. AGND ............................... -0.6V to VDD +0.6V

Storage temperature .....................................-65°C to +150°C

Ambient temp. with power applied ................-65°C to +125°C

Soldering temperature of leads (10 seconds) ............. +300°C

ESD on the analog inputs (HBM,MM) ................. 5.0 kV, 500V

ESD on all other pins (HBM,MM) ........................ 5.0 kV, 500V

† Notice: Stresses above those listed under “Maximum

Ratings” may cause permanent damage to the device.

This is a stress rating only and functional operation of

the device at those or any other conditions above those

indicated in the operation listings of this specification is

not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = DVDD = 4.5V – 5.5V,

Internal VREF, HPF turned on (AC mode), AGND, DGND = 0V, MCLK = 3.58 MHz; TA = -40°C to +85°C.

Parameter

Sym

Min

Typ

Max

Units

Comment

Overall Measurement Accuracy

Energy Measurement Error

—

0.1

—

% FOUT Channel 0 swings 1:500 range,

MCP3905A, MCP3905L only

(Note 1, Note 4)

—

0.1

—

% FOUT Channel 0 swings 1:1000 range,

MCP3906A only (Note 1, Note 4)

No-Load Threshold/

Minimum Load

NLT

—

0.0015

—

% FOUT

Max

Disabled when F2, F1, F0 = 0, 1, 1

(Note 5, Note 6)

Phase Delay Between

Channels

—

1/MCLK

HPF = 0 and 1, < 1 MCLK

(Note 4, Note 6, Note 7)

AC Power Supply Rejection

(output frequency variation)

AC PSRR

—

0.01

—

% FOUT F2, F1, F0 = 0, 1, 1 (Note 3)

DC Power Supply Rejection

(output frequency

variation)

DC PSRR

—

0.01

—

% FOUT HPF = 1, Gain = 1 (Note 3)

System Gain Error

—

% FOUT (Note 2, Note 5)

ADC/PGA Specifications

Offset Error

VOS

—

Referred to Input

Gain Error Match

—

0.5

—

% FOUT (Note 5)

Internal Voltage Reference

Voltage

—

2.4

—

Tolerance

—

±2

—

Tempco

—

ppm/°C

Note 1:

Measurement error = (Energy Measured By Device - True Energy)/True Energy * 100%. Accuracy is

measured with signal (±660 mV) on Channel 1. FOUT0, FOUT1 pulse outputs. Valid from 45 Hz to 65 Hz.

See typical performance curves for higher frequencies and increased dynamic range.

Does not include internal VREF. Gain = 1, CH0 = 470 mVDC, CH1 = 660 mVDC, difference between

measured output frequency and expected transfer function.

Percent of HFOUT output frequency variation; Includes external VREF = 2.5V, CH1 = 100 mVRMS @

50 Hz, CH2 = 100 mVRMS @ 50 Hz, AVDD = 5V + 1Vpp @ 100 Hz. DC PSRR: 5V ±500 mV

Error applies down to 60 degree lead (PF = 0.5 capacitive) and 60 degree lag (PF = 0.5 inductive).

Refer to Section 4.0 “Device Overview” for complete description.

Specified by characterization, not production tested.

1 MCLK period at 3.58 MHz is equivalent to less than <0.005 degrees at 50 or 60 Hz.

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