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AS4SD8M16DG-75/XT Datasheet(PDF) 40 Page - Micross Components |
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AS4SD8M16DG-75/XT Datasheet(HTML) 40 Page - Micross Components |
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40 / 52 page ![]() SDRAM AS4SD8M16 AS4SD8M16 Rev. 1.6 March 27, 2015 Micross Components reserves the right to change products or specifications without notice. 40 ALTERNATING BANK READ ACCESSES1 *CAS latency indicated in parentheses. NOTES: 1. For this example, the burst length = 4, the CAS latency = 2. 2. A9, A11= “Don’t Care” TIMING PARAMETERS MIN MAX MIN MAX tAC(3) 5.4 ns tCMH 0.8 ns tAC(2) 6 ns tCMS 1.5 ns tAH 0.8 ns tLZ 1 ns tAS 1.5 ns tOH 3 ns tCH 2.5 ns tRAS 44 80,000 ns tCL 2.5 ns tRC 66 ns tCK(3) 7.5 ns tRCD 20 ns tCK(2) 10 ns tRP 20 ns tCKH 0.8 ns tRRD 15 ns tCKS 1.5 ns -75 UNITS -75 SYMBOL* UNITS SYMBOL* |
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