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SX20AC75-I/TQ Datasheet(PDF) 37 Page - List of Unclassifed Manufacturers

Part # SX20AC75-I/TQ
Description  Configurable Communications Controllers with EE/Flash Program Memory, In-System Programming Capability and On-Chip Debug
PDF  52 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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SX20AC75-I/TQ Datasheet(HTML) 37 Page - List of Unclassifed Manufacturers

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© 2000 Scenix Semiconductor, Inc. All rights reserved.
- 37 -
www.scenix.com
SX18AC/SX20AC/SX28AC/SX18AC75/SX20AC75/SX28AC75
Program Control instruction
CALL addr8
Call Subroutine:
top-of-stack = program counter + 1
PC(7:0) = addr8
program counter (8) = 0
program counter (10:9) = PA1:PA0
23
1001 kkkk kkkk
none
JMP addr9
Jump to Address:
PC(7:0) = addr9(7:0)
program counter (8) = addr9(8)
program counter (10:9) = PA1:PA0
23
101k kkkk kkkk
none
NOP
No Operation
11
0000 0000 0000
none
RET
Return from Subroutine
(program counter = top-of-stack)
23
0000 0000 1100
none
RETP
Return from Subroutine Across Page Boundary
(PA1:PA0 = top-of-stack (10:9) and
program counter = top-of-stack)
23
0000 0000 1101
PA1, PA0
RETI
Return from Interrupt (restore W, STATUS,
FSR, and program counter from shadow regis-
ters)
23
0000 0000 1110 all STA-
TUS, ex-
cept TO,
PD
RETIW
Return from Interrupt and add W to RTCC (re-
store W, STATUS, FSR, and program counter
from shadow registers; and add W to RTCC)
23
0000 0000 1111 all STA-
TUS, ex-
cept TO,
PD
RETW lit
Return from Subroutine with Literal in W
(W = lit and program counter = top-of-stack)
23
1000 kkkk kkkk
none
System Control Instructions
BANK addr8
Load Bank Number into FSR(7:5)
FSR(7:5) = addr8(7:5)
11
0000 0001 1nnn
none
IREAD
Read Word from Instruction Memory
MODE:W = data at (MODE:W)
14
0000 0100 0001
none
PAGE addr12
Load Page Number into STATUS(7:5)
STATUS(7:5) = addr12(11:9)
11
0000 0001 0nnn
PA1, PA0
SLEEP
Power Down Mode
WDT = 00h, TO = 1, stop oscillator
(PD = 0, clears prescaler if assigned)
11
0000 0000 0011
TO, PD
Table 16-1. The SX Instruction Set (Continued)
Mnemonic,
Operands
Description
Cycles
(Compatible)
Cycles
(Turbo)
Opcode
Bits
Affected



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