PC87570 datasheet(8/168 Pages) NSC

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Table of Contents

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7.2

FUNCTIONAL DESCRIPTION .................................................................................................. 76

7.2.1

Setting Clock Frequency ............................................................................................. 76

7.2.2

Fast Clock Setting ....................................................................................................... 77

7.3

HFCG REGISTERS ................................................................................................................... 77

7.3.1

HFCG Control Register (HFCGCTRL) ........................................................................ 77

7.3.2

HFCGM Low Value Register (HFCGML) ..................................................................... 77

7.3.3

HFCGM High Value Register (HFCGMH) ................................................................... 77

7.3.4

HFCGN Value Register (HFCGN) ............................................................................... 77

7.3.5

HFCGI Low Value Register (HFCGIL) ......................................................................... 78

7.3.6

HFCGI High Value Register (HFCGIH) ....................................................................... 78

8.0

Power Mode Control (PMC)

8.1

FEATURES ................................................................................................................................ 79

8.2

THE POWER MODES ............................................................................................................... 79

8.3

SWITCHING BETWEEN POWER MODES ............................................................................... 79

8.3.1

Decreasing Power Consumption ................................................................................. 79

8.3.2

Increasing Performance .............................................................................................. 79

8.4

POWER MODE CONTROL REGISTER (PMCR) ..................................................................... 80

8.5

USAGE HINTS .......................................................................................................................... 80

9.0

Interrupt Control Unit (ICU)

9.1

FEATURES ................................................................................................................................ 81

9.2

FUNCTIONAL DESCRIPTION .................................................................................................. 81

9.2.1

NMI .............................................................................................................................. 81

9.2.2

Maskable Interrupts ..................................................................................................... 81

9.2.3

Edge/Level and Polarity Selection ............................................................................... 81

9.2.4

Pending Interrupts ....................................................................................................... 81

9.2.5

External Interrupt Inputs .............................................................................................. 81

9.2.6

Interrupt Assignment ................................................................................................... 81

9.3

ICU REGISTERS ....................................................................................................................... 82

9.3.1

NMI Status Register (NMISTAT) ................................................................................. 82

9.3.2

Power Fail Control Register (PFAIL) ........................................................................... 82

9.3.3

Interrupt Vector Register (IVCT) .................................................................................. 83

9.3.4

Interrupt Enable and Mask Register (IENAM) ............................................................. 83

9.3.5

Interrupt Pending Register (IPEND) ............................................................................ 83

9.3.6

Edge Interrupt Clear Register (IECLR) ........................................................................ 83

9.3.7

Edge/Level Trigger Configuration Register (IELTG) .................................................... 83

9.3.8

Trigger Polarity Configuration Register (ITRPL) .......................................................... 83

9.4

USAGE HINTS .......................................................................................................................... 83

9.4.1

Initializing ..................................................................................................................... 83

9.4.2

Clearing ....................................................................................................................... 83

9.4.3

Nesting ........................................................................................................................ 83

10.0

Multi-Input Wake-Up (MIWU)

10.1

FEATURES ................................................................................................................................ 84

PC87570 Datasheet(PDF) 8 Page - National Semiconductor (TI)

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