ST72361AR4-Auto datasheet(130/279 Pages) STMICROELECTRONICS

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8-bit timer (TIM8)

ST72361xx-Auto

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Doc ID 12468 Rev 3

These registers are readable and writable and are not affected by the timer hardware. A

reset event changes the OCiR value to 00h.

Timing resolution is one count of the free running counter: (fCPU/CC[1:0]).

Procedure

To use the output compare function, select the following in the CR2 register:

●

Set the OCiE bit if an output is needed then the OCMPi pin is dedicated to the output

compare i signal.

●

Select the timer clock (CC[1:0]) (see Table 55).

And select the following in the CR1 register:

●

Select the OLVLi bit to applied to the OCMPi pins after the match occurs.

●

Set the OCIE bit to generate an interrupt if it is needed.

When a match is found between OCRi register and CR register:

●

OCFi bit is set.

●

The OCMPi pin takes OLVLi bit value (OCMPi pin latch is forced low during reset).

●

A timer interrupt is generated if the OCIE bit is set in the CR1 register and the I bit is

cleared in the CC register (CC).

The OCiR register value required for a specific timing application can be calculated using

the following formula:

Where:

t

Output compare period (in seconds)

fCPU

PLL output x2 clock frequency in hertz (or fOSC/2 if PLL is not enabled)

PRESC =

Timer prescaler factor (2, 4, 8 or 8000 depending on CC[1:0] bits, see

Table 55)

Clearing the output compare interrupt request (that is, clearing the OCFi bit) is done by:

Reading the SR register while the OCFi bit is set.

An access (read or write) to the OCiR register.

Note:

Once the OCIE bit is set both output compare features may trigger interrupt requests. If only

one is needed in the application, the interrupt routine software needs to discard the

unwanted compare interrupt. This can be done by checking the OCF1 and OCF2 flags and

resetting them both.

If the OCiE bit is not set, the OCMPi pin is a general I/O port and the OLVLi bit will not

appear when a match is found but an interrupt could be generated if the OCIE bit is set.

When the timer clock is fCPU/2, OCFi and OCMPi are set while the counter value equals the

OCiR register value (see Figure 66). This behavior is the same in OPM or PWM mode.

 OCiR = t *

fCPU

PRESC

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