Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

ST72361AR4-Auto Datasheet(PDF) 140 Page - STMicroelectronics

Part # ST72361AR4-Auto
Description  Clock, reset and supply management
PDF  279 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72361AR4-Auto Datasheet(HTML) 140 Page - STMicroelectronics

Back Button ST72361AR4-Auto Datasheet HTML 136Page - STMicroelectronics ST72361AR4-Auto Datasheet HTML 137Page - STMicroelectronics ST72361AR4-Auto Datasheet HTML 138Page - STMicroelectronics ST72361AR4-Auto Datasheet HTML 139Page - STMicroelectronics ST72361AR4-Auto Datasheet HTML 140Page - STMicroelectronics ST72361AR4-Auto Datasheet HTML 141Page - STMicroelectronics ST72361AR4-Auto Datasheet HTML 142Page - STMicroelectronics ST72361AR4-Auto Datasheet HTML 143Page - STMicroelectronics ST72361AR4-Auto Datasheet HTML 144Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 140 / 279 page
background image
8-bit timer (TIM8)
ST72361xx-Auto
140/279
Doc ID 12468 Rev 3
Note:
Reading or writing the ACTR register does not clear TOF.
Bit 4 = ICF2 Input Capture Flag 2.
0: no input capture (reset value).
1: an input capture has occurred on the ICAP2 pin. To clear this bit, first read the SR
register, then read or write the IC2R register.
Bit 3 = OCF2 Output Compare Flag 2.
0: no match (reset value).
1: the content of the free running counter has matched the content of the OC2R
register. To clear this bit, first read the SR register, then read or write the OC2R
register.
Bit 2 = TIMD Timer disable.
This bit is set and cleared by software. When set, it freezes the timer prescaler and counter
and disabled the output functions (OCMP1 and OCMP2 pins) to reduce power consumption.
Access to the timer registers is still available, allowing the timer configuration to be changed,
or the counter reset, while it is disabled.
0: Timer enabled
1: Timer prescaler, counter and outputs disabled
Bits 1:0 = Reserved, must be kept cleared.
13.7.4
Input capture 1 register (IC1R)
Read only
Reset value: Undefined
This is an 8-bit read only register that contains the counter value (transferred by the input
capture 1 event).
13.7.5
Output compare 1 register (OC1R)
Read/write
Reset value: 0000 0000 (00h)
This is an 8-bit register that contains the value to be compared to the CTR register.
7
0
MSB
LSB
7
0
MSB
LSB



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com