ST72361AR4-Auto datasheet(137/279 Pages) STMICROELECTRONICS

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ST72361xx-Auto

8-bit timer (TIM8)

Doc ID 12468 Rev 3

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13.6

Summary of timer modes

13.7

Each Timer is associated with three control and status registers, and with six data registers

(8-bit values) relating to the two input captures, the two output compares, the counter and

the alternate counter.

13.7.1

Control register 1 (CR1)

Read/ write

Reset value: 0000 0000 (00h)

Bit 7 = ICIE Input Capture Interrupt Enable.

0: Interrupt is inhibited.

1: A timer interrupt is generated whenever the ICF1 or ICF2 bit of the SR register is set.

Bit 6 = OCIE Output Compare Interrupt Enable.

0: Interrupt is inhibited.

1: A timer interrupt is generated whenever the OCF1 or OCF2 bit of the SR register is

set.

Bit 5 = TOIE Timer Overflow Interrupt Enable.

0: Interrupt is inhibited.

1: A timer interrupt is enabled whenever the TOF bit of the SR register is set.

Table 54.

Timer modes

Modes

Available resources

Input capture 1

Input capture 2

Output compare

Output compare 2

Input Capture

(1 and/or 2)

Yes

Output Compare

(1 and/or 2)

One Pulse Mode

Not

Recommended(1)

See note 4 in One pulse mode.

Partially(2)

See note 5 in One pulse mode.

PWM Mode

Not

Recommended(3)

See note 4 in Pulse width modulation mode.

ICIE

OCIE

TOIE

FOLV2

FOLV1

OLVL2

IEDG1

OLVL1

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