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STM8S105C4 Datasheet(PDF) 116 Page - STMicroelectronics |
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STM8S105C4 Datasheet(HTML) 116 Page - STMicroelectronics |
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116 / 121 page ![]() Revision history STM8S105x4/6 116/121 DocID14771 Rev 15 15 Revision history Table 57. Document revision history Date Revision Changes 05-Jun-2018 1 Initial release. 23-Jun-2018 2 Corrected the number of high sink outputs to 9 in I/Os in Features . Updated part numbers in STM8S105xx access line features . 12-Aug-2008 3 Updated the part numbers in STM8S105xx access line features . USART renamed UART1, LINUART renamed UART2. Added Table: Pin-to-pin comparison of pin 7 to 12 in 32- pin access line devices. 17-Sep-2008 4 Removed STM8S102xx and STM8S104xx root part numbers corresponding to devices without data EEPROM. Updated STM8S103 pinout section Added low and medium density Flash memory categories. Added Note 1 in Section: Current characteristics. Updated Section: Option bytes. 05-Feb-2009 5 Updated STM8S103 pinout. Updated number of High Sink I/Os in the pinout section. TSSOP20 pinout modified (PD4 moved to pin 1 etc.) Added WFQFN20 package Updated Section: Option bytes. Added Section: Memory and register map. 27-Feb-2009 6 Removed STM8S103x products (separate STM8S103 datasheet created). Updated Section: Electrical characteristics. |
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