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STM32F383CC Datasheet(PDF) 60 Page - STMicroelectronics

Part # STM32F383CC
Description  Reset and power management
PDF  125 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F383CC Datasheet(HTML) 60 Page - STMicroelectronics

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Electrical characteristics
STM32F383xx
60/125
DocID023367 Rev 2
6.3.4
Supply current characteristics
The current consumption is a function of several parameters and factors such as the
operating voltage, ambient temperature, I/O pin loading, device software configuration,
operating frequencies, I/O pin switching rate, program location in memory and executed
binary code.
The current consumption is measured as described in Figure 11: Current consumption
measurement scheme.
All Run-mode current consumption measurements given in this section are performed with a
reduced code that gives a consumption equivalent to CoreMark code.
Typical and maximum current consumption
The MCU is placed under the following conditions:
•
All I/O pins are in input mode with a static value at VDD or VSS (no load)
•
All peripherals are disabled except when explicitly mentioned
•
The Flash memory access time is adjusted to the fHCLK frequency (0 wait state from 0
to 24 MHz, 1 wait state from 24 to 48 MHz and 2 wait states from 48 MHz to 72 MHz)
•
Prefetch in ON (reminder: this bit must be set before clock setting and bus prescaling)
•
When the peripherals are enabled fAPB1 = fAHB/2 , fAPB2 = fAHB
•
When fHCLK > 8 MHz PLL is ON and PLL inputs is equal to HSI/2 = 4 MHz (if internal
clock is used) or HSE = 8 MHz (if HSE bypass mode is used)
The parameters given in Table 26 to Table 31 are derived from tests performed under
ambient temperature and supply voltage conditions summarized in Table 22.
Table 26. Typical and maximum current consumption from VDD supply at VDD = 1.8 V
Symbol Parameter Conditions
fHCLK
All peripherals enabled
All peripherals disabled
Unit
Typ
Max @ TA(1)
Typ
Max @ TA(1)
25 °C
85 °C
105 °C
25 °C
85 °C 105 °C
IDD
Supply
current in
Run mode,
code
executing
from Flash
HSE
bypass,
PLL on
72 MHz 64.9
75.3
77.1
84.0
31.0
34.0
35.0
36.7
mA
64 MHz 58.3
67.0
68.7
74.4
27.8
30.4
31.2
32.7
48 MHz 44.8
50.5
52.0
55.5
21.3
23.1
23.9
24.8
32 MHz 30.7
33.9
35.1
36.7
14.6
15.8
16.4
17.1
24 MHz 23.4
25.6
26.6
27.5
11.3
12.1
12.7
13.3
HSE
bypass,
PLL off
8 MHz
8.1
8.9
9.3
9.9
4.0
4.4
4.8
5.3
1 MHz
1.3
1.7
2.0
2.5
0.9
1.2
1.6
2.0
HSI clock,
PLL on
64 MHz 54.0
61.6
63.2
68.2
27.5
30.1
30.9
32.3
48 MHz 41.5
46.6
47.9
51.0
21.1
22.9
23.6
24.5
32 MHz 28.4
31.3
32.5
33.9
14.5
15.6
16.2
16.9
24 MHz 21.8
23.8
24.8
25.6
7.6
8.2
8.8
9.3
HSI clock,
PLL off
8 MHz
7.7
8.4
8.9
9.5
4.0
4.4
4.8
5.3



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