STM32F383CC datasheet(22/125 Pages) STMICROELECTRONICS

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Functional overview

STM32F383xx

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DocID023367 Rev 2

3.17.3

Independent watchdog (IWDG)

The independent watchdog is based on a 12-bit downcounter and 8-bit prescaler. It is

clocked from an independent 40 kHz internal RC and as it operates independently from the

main clock, it can operate in Stopmode. It can be used either as a watchdog to reset the

device when a problem occurs, or as a free running timer for application timeout

management. It is hardware or software configurable through the option bytes. The counter

can be frozen in debug mode.

3.17.4

System window watchdog (WWDG)

The system window watchdog is based on a 7-bit downcounter that can be set as free

running. It can be used as a watchdog to reset the device when a problem occurs. It is

clocked from the APB1 clock (PCLK1) derived from the main clock. It has an early warning

interrupt capability and the counter can be frozen in debug mode.

3.17.5

SysTick timer

This timer is dedicated to real-time operating systems, but could also be used as a standard

down counter. It features:

•

A 24-bit down counter

•

Autoreload capability

•

Maskable system interrupt generation when the counter reaches 0

•

Programmable clock source

3.18

Real-time clock (RTC) and backup registers

The RTC and the backup registers are supplied through VDDsupply pin. The backup

registers are thirty two 32-bit registers used to store 128 bytes of user application data.

They are not reset by a system or power reset.

The RTC is an independent BCD timer/counter. Its main features are the following:

•

Calendar with subsecond, seconds, minutes, hours (12 or 24 format), week day, date,

month, year, in BCD (binary-coded decimal) format.

•

Automatic correction for 28th, 29th (leap year), 30th and 31st day of the month.

•

2 programmable alarms with wake up from Stop mode capability.

•

Periodic wakeup unit with programmable resolution and period.

•

On-the-fly correction from 1 to 32767 RTC clock pulses. This can be used to

synchronize it with a master clock.

•

Digital calibration circuit with 1 ppm resolution, to compensate for quartz crystal

inaccuracy.

•

3 anti-tamper detection pins with programmable filter. The MCU can be woken up from

Stop mode on tamper event detection.

•

Timestamp feature which can be used to save the calendar content. This function can

triggered by an event on the timestamp pin, or by a tamper event. The MCU can be

woken up from Stop mode on timestamp event detection.

•

Reference clock detection: a more precise second source clock (50 or 60 Hz) can be

used to enhance the calendar precision.

STM32F383CC Datasheet(PDF) 22 Page - STMicroelectronics

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