STM32F383CC datasheet(103/125 Pages) STMICROELECTRONICS

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STM32F383xx

Electrical characteristics

109

6.3.22

CAN (controller area network) interface

Refer to Section 6.3.13: I/O port characteristics for more details on the input/output alternate

function characteristics (CAN_TX and CAN_RX).

6.3.23

SDADC characteristics

/32

0.8

3276.8

/64

1.6

6553.6

/128

3.2

13107.2

/256

6.4

26214.4

1. These timings are given for a 40 kHz clock but the microcontroller’s internal RC frequency can vary from 30

to 60 kHz. Moreover, given an exact RC oscillator frequency, the exact timings still depend on the phasing

of the APB interface clock versus the LSI clock so that there is always a full RC period of uncertainty.

2. Data based on characterization results, not tested in production.

Table 68. WWDG min-max timeout value @72 MHz (PCLK)

Prescaler

WDGTB

Min timeout value

Max timeout value

0.05687

3.6409

0.1137

7.2817

0.2275

14.564

0.4551

29.127

Table 67. IWDG min/max timeout period at 40 kHz (LSI) (continued)(1)(2)

Prescaler divider

PR[2:0] bits

Min timeout (ms) RL[11:0]=

0x000

Max timeout (ms) RL[11:0]=

0xFFF

Table 69. SDADC characteristics (1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Note

VDDSDx

Power

supply

Slow mode (fADC = 1.5 MHz)

2.2

VDDA

Fast mode (fADC = 6 MHz)

2.4

VDDA

fADC

SDADC

clock

frequency

Slow mode (fADC = 1.5 MHz)

0.5

1.5

1.65

MHz

Fast mode (fADC = 6 MHz)

0.5

6.3

VREFSD+

Positive ref.

voltage

1.1

VDDSDx

VREFSD-

Negative

ref. voltage

-VSSA

-V

IDDSDx

Supply

current

(VDDSDx =

3.3 V)

Fast mode (fADC = 6 MHz)

800

1200

µA

Slow mode (fADC = 1.5 MHz)

600

Standby

200

Power down

2.5

SD_ADC off

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