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STHVDAC-253M Datasheet(PDF) 20 Page - STMicroelectronics

Part # STHVDAC-253M
Description  Antenna tuning circuit
PDF  27 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STHVDAC-253M Datasheet(HTML) 20 Page - STMicroelectronics

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Register table
STHVDAC-253M
20/27
DocID025735 Rev 1
4.4
Serial interface specification
Figure 9. Register write command sequence
Figure 10. Register read command sequence
Table 15. Interface specification
Conditions: AVDD from 2.3 to 5 V, VIO from 1.65 to 1.95 V, Tamb from -30 °C to +85 °C, unless
otherwise specified
Symbol
Parameter
Condition
min
typ max
unit
FCLK
Clock frequency
26
MHz
TCLK
Clock period
38,4
ns
THIGH
Clock high time
11,25
ns
TLOW
Clock low time
11,25
ns
TDsetup
DATA setup time
Relative to 30% of CLK failing edge
1
ns
TDhold
DATA hold time
Relative to 70% of CLK failing edge
5
ns
CCLK
CLK pin input
capacitance
5pF
CDATA
DATA pin input
capacitance
8pF
SA3
SA2
SA1
SA0
A4
A3
A2
A1
A0
P
SCLK
SDATA
Register write command frame
A
SSC
0
1
0
SCLK
SDATA
A
D2
D1
D0
P
0
D6
D5
D4
D3
D7
P
Data frame
Bus
Park
SA3
SA2
SA1
SA0
A4
A3
A2
A1
A0
P
SCLK
SDATA
Register read command frame
A
SSC
01
1
SCLK
SDATA
A
D3
D2
D1
D0
0
D7
D6
D5
D4
P
Data frame ( from slave)
Bus
Park
0
Bus
Park
P
Signal driven by master
Signal driven by slave



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